# High-Swing Cascode Current Mirror

I am currently dealing with current mirrors and came across the circuit shown below, a High-Swing Cascode Current Mirror. I read that this implementation, as the name suggests, has the advantage of a high voltage headroom, since the minimum potential at the drain terminal of M4 is: $$V_{D4\_min}=V_{DS4}+V_{DS2}=(V_{GS4}-V_{TH})+(V_{GS2}-V_{TH})$$ So the drain potential at M4 only needs to be twice the overdrive voltage, in case of same transistor dimensions, in order to hold M2 and M4 in saturation. But cannot this be said for many other cascode current mirrors, since that behaviour simply occurs by "stacking" together two transistors (M2 and M4)? Additionally, why is there a connection from the gate of M1 to the drain of M3? I have a hard time understanding whats going on in this circuit, help is greatly appreciated. EDIT: A bias voltage source is setting the potential at the gate of M3/4. Sorry its not shown in the circuit.

EDIT 2: I just read that the mentioned bias voltage is implemented by a MOSFET in diode configuration, like here. For further discussion lets call it M5.

• what's setting the gate of M3/4? M3/4 will have a slightly higher threshold because the source will be off the bulk tie a bit. The drain of M1 becomes the source of M3. Feb 12, 2017 at 21:58
• @bdegnan A bias voltage is setting the potential at the gate of M3/4, sry its not shown in the circuit
– Daiz
Feb 12, 2017 at 22:54
• @Daiz What is this bias voltage ? I had assumed that the gate were connected, Without this the question is incomplete. Because you are discussing about swing and without knowing the bias points it cannot be analyzed. Feb 12, 2017 at 23:11
• @BhuvaneshNarayanan Ok, I read up about the bias voltage, see EDIT 2.
– Daiz
Feb 12, 2017 at 23:20
• @Daiz I have modified the answer according to the link, kindly have a look. Feb 13, 2017 at 0:06