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In Altium I set power pins to hidden in my component library, but I leave the "Connect to" empty (this is because I do not always connect the power pins to the same nets. Power pins can be connected to VCC, VDD, VEE, 3V3, GND... depending on where the component is used). I set Unconnected Power pin to report an error in the connection matrix, but at Altium they hid the hidden pins so well that not even their ERC tool can detect they are unconnected! No error is reported during the ERC in the schematic. This is really annoying! Moving to the PCB, no net is assigned to those power pins. To me those are unconnected power pins (they are defined as type power in the component) and they shall be detected during the ERC. (In fact, non-hidden unconnected power pins are detected by the ERC).

Suppose someone else is taking care of the PCB design... those unconnected pins may remain as such till the board manufacturing phase. Not good at all.

The obvious solution is to fill in the "Connect to" field of the power pins in the schematic. But suppose one forgets that step... The ERC shall detect such oversight!

Trying to make my question clearer: The Altium manual states:

"For a multi-part component, the power net connections should ideally be assigned through use of Part Zero. For each pin that is required to connect to a power net in this way, simply enable the Hide option, leave the Connect To field blank, and set the Part Number field to 0."

I have followed this procedure. The problem is that there appears to be no way to get the ERC to detect that the "Connect To" field has been left blank in a component placed in a schematic (I mean not in the library). Setting "Nets with only one pin" to error does not trigger any error for unconnected hidden pins as well. It seems that some ERC rules are not applied to hidden pins.

How can I get the Altium ERC to detect unconnected hidden power pins?

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  • \$\begingroup\$ I've never used Altium -- how do you then connect a hidden power pin to a net of your choosing? \$\endgroup\$ – Dave Tweed Feb 13 '17 at 20:11
  • \$\begingroup\$ See last two lines (edited): "The obvious solution..." \$\endgroup\$ – tomatoma Feb 13 '17 at 20:18
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    \$\begingroup\$ ERC checks cannot detect all design flaws, and in a way, hiding all power pins on your components is a massive design methodology flaw. Your argument is that ERC should find it anyway, but not when they design for common use case. Tell your company to start doing it the right way for the next 40 years. \$\endgroup\$ – Joel Wigton Feb 13 '17 at 20:48
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    \$\begingroup\$ @DigitalNinja: the hidden status of a pin in the schematic does not change the pin on the actual component! If the component datasheet requires the pin to be connected, this connection shall be checked regardless the hide property of the pin in the component symbol. If it is a power pin and you set the ERC to detect unconnected power pins, it is because you would like to avoid having unconnected power pins on your board. To me, the ERC should not ignore hidden pins, because they are not hidden at all on the board! \$\endgroup\$ – tomatoma Feb 15 '17 at 19:39
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    \$\begingroup\$ The only way it ever makes sense to hide power pins is if you ALSO generate a report included with the schematic that tells what power net each of the hidden pins is connected to. This is an ancient and terrible practice from back when you only had a +5V rail. \$\endgroup\$ – Daniel Feb 16 '17 at 0:17

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