# How can I create AND/OR logic gates using comparators?

I want to create AND/OR logic gates using comparators which do not consume a lot of currents. I tried to design the gates using transistors as shown below. But, this might draw a lot of currents.

At the end,

I want minimal current flowing through the circuit and 3.0-3.3 volts at Vout.

simulate this circuit – Schematic created using CircuitLab

• Why comparators? Transistors are fine, e.g., CMOS? Feb 14, 2017 at 19:21
• Currently, I have BC547, 2N2222 transistors, and a lot of comparators (LM393, LM324). I need to finish this today. Time constraints! Feb 14, 2017 at 19:23
• Why didn't you ask yesterday? Feb 14, 2017 at 19:28
• Do you have any PNP transistors? Feb 14, 2017 at 19:28
• Comparators such as LM393 have open collector outputs can be wired AND together. And the comparator itself can be configured to be inverting or not. Feb 14, 2017 at 19:56

AND gate with wired-or comparator:

simulate this circuit – Schematic created using CircuitLab

You can invert either input (or both) by swapping the respective inverting and non-inverting inputs. Be sure to check fanout in your desired system configuration.

But if you want really low current, just buy some CMOS or HCMOS logic chips.

• "...some CMOS or HCMOS logic chips" - and remember to tie any unused inputs to a power rail? Feb 14, 2017 at 20:05
• I initially thought of something similar but concluded that this solution draws as much current as the OP's initial circuit. In addition, you have to come up with a VDD/2 reference which might also consume power via resistor ladder Feb 15, 2017 at 1:26

Since you have both NPN and PNP transistors, I would just implement complimentary logic gates using those. They can be structured just as CMOS logic gates. Then you only have to take care of the base current by placing resistors and capacitors around them. See, for example, the inverter shown in (included here for convenience):

http://webpages.charter.net/dawill/tmoranwms/Circuits_2008/Complementary_RTL_Inverter.gif

The quiescent current of something like this will be much lower than the class-A logic gate you have built.