Harmonic balance simulation is an attempt to handle non-linear devices in an S-parameter situation.
Crudely what happens is this.
a) The input voltages/currents are applied to the non-linearities, and solved with a SPICE-like solver, to get the complex amplitudes of the harmonics, which are then used as sources for travelling waves.
b) Then the normal linear matrix is solved for travelling waves at each harmonic individually, by a conventional S-parameter solver.
c) Then the waves are added up again at each node to get voltage and current, which is where we came in, rinse and repeat, until convergence.
It is better than ignoring the non-linearities, and better than ignoring the S-parameters, but still only an estimate of what is really happening.
Obviously if we use only the first few harmonics (low order), the situation is under-modelled and the fit will be poor. What is less obvious is that if we ask for a high order and use too many harmonics, the situation may be 'over-modelled', a common problem in model fitting, where the model strives to model minor errors and so departs from a 'best estimate' of what is going on.
Of course many of the parameters that go into the models are not directly measured, but have been inferred from fitting a simulation to a measurement. In addition, some of the parameters that matter up to (say) the 10th harmonic of 2450MHz are not very repeatable, and will vary wildly between NXP's calibration measurements and your simulations or prototypes. A mounting position error of (say) 0.2mm is irrelevant at 2450MHz, but becomes increasingly significant at higher order.
Have a healthy respect for the existence of errors and discrepancies from all sources when trying to understand data sheets and simulations, and your prototypes for that matter.
The change in modelling performance of harmonic balance as you adjust the order could give you a clue as to how well it's going to model reality.