In case of a Boost converter, one of the advantages that I always come across is the fact that you can use a simpler low-side driver. I fabricated such a Boost converter in open loop using the IRS44273I driver IC (Datasheet driver IC). The PWM is generated by a microcontroller that shares the GND plane with the driver IC (COM port in the drawing on the first page of the datasheet). I however heard that it is good practice to keep these two grounds separate (I don't exactly know why).

Is this also the case for a Boost converter? Would it be recommended to place some kind of digital signal isolator in between the µC and the MOSFET driver? For the moment I don't have any problems but I am making a new version of the board with measurements to drive it in closed loop. In case a separate ground plane is needed, I would like to add it.

I appreciate your help and comments on this topic.

  • 1
    \$\begingroup\$ How about showing the circuit diagram? \$\endgroup\$ – Andy aka Feb 15 '17 at 9:48

however heard that it is good practice to keep these two grounds separate

It is beneficial to have a star grounding scheme, read here: http://www.analog.com/en/analog-dialogue/articles/staying-well-grounded.html this means (partially) separated grounds which all come together at one point (like battery ground for example).

The reason to do this is to separate the current loops to stop them interfering with other circuits.

In your case of a boost converter (also DCDC converters in general) you would want to separate the current loop at the output (switches, inductor, diode etc), from the control circuits like the uC.

If you don't separate these current loops, the current flowing in the "power" loop at the output can interfere with the uC. For example if the returning current of the ground connection of the output shares the ground connection of the uC. Then the ground of the uC might be "lifted" in voltage and/or have a lot of disturbance and noise on it. If the uC gets its own connection (star ground !) to a "quiet" grounding point then these problems would be eliminated.

  • \$\begingroup\$ Just to be sure that I understand correctly: If I have a PCB trace coming from a PWM pin of my µC, going to my MOSFET driver, it would be good to put a GND trace right next to it (like differential pair routing) and then connect this ground of the µC to the GND of the power plane at the place of the driver. And it would not be good to put only the PWM output trace from µC to driver and then just connect the GND of the µC and the power ground together, where the µC is placed? \$\endgroup\$ – Simon R Feb 27 '17 at 11:47
  • \$\begingroup\$ Correct, the point is to avoid grounding lines (like for the uC) carrying large currents (from the driver). So the drivers's ground point would then be the star point where all grounds come together. The uC would have it's own ground line (carrying only the currents the uC needs) to that same star point. \$\endgroup\$ – Bimpelrekkie Feb 27 '17 at 12:33

Separate Ground will not avoid this problem: high transient currents (wow! in a Switching Regulator?) nearby to a regulation loop.

Assume your dT/dT is 1 amp/10 nanoseconds, 1 millimeter from the regulator. Assume the regulator circuit has a loop area of 3.16mm * 3.16mm. What is the induced upset into the regulator circuit (independent of Grounds)?

$$Vinduce = 2e-7 Henry/meter * Area/Distance * dI/dT$$ $$Vinduce = 2e-7 Henry/meter * 10 mm*mm/1mm * 1e+8 amp/second$$ $$Vinduce = 1e-7 * 0.01 * 1e+8$$ $$Vinduce = 1e-9 * 1e+8$$ $$Vinduce = 0.1 volt upset into your regulator circuit$$

[the formula is a combination of Biot-Savart and Faraday] [where an infinite straight wire couples into a loop, the wire being in the plane of the loop; for exact math, we need to integrate; here we just get an approximation; the large error ----- 0.1 volts ----- tells us we have a problem]

You may or may not encounter this self-trashing problem, because orientation of "wire" to "loop" can be your friend; also, Skin Depth for 10 nanosecond edges will somewhat attenuate the induced voltage; beware the HORRID propagation delay for pulses attempting to cross that 35 microns of copper foil; the delay is big----- 150 nanoseconds ----- and will confuse you, because the delay destroys any sense of causality. Jackson (E&M) discusses the delay.


"Star ground" when done incorrectly is a good way to make things worse. You need a good excuse not to have a solid ground plane...

Now, examine your Boost schematic, and trace both current loops. The common part is GND - Input cap - Inductor, and then the current flows into...

  • MOSFET ON: MOSFET drain then source - GND
  • MOSFET OFF: Diode - Output cap - GND

The correct layout for a Boost has the MOSFET source and the GND pin of the output capacitors right next to each other, and connected to GND plane using the same vias. This ensures than the high di/dt currents created by switching between the two loops described above do not contaminate the GND plane.

This is the most important thing in a DC-DC converter, and violating this rule will turn your ground plane in the vicinity into a minefield of HF spikes.

Also, try to layout these two loops close to each other. This means put the diode next to the FET, so when current switches from one loop to the other, radiated fields are minimized. If the two loops could coincide perfectly, then there would be no radiated field, but this is of course impossible.

For extra goodness, connect the input caps GND pin very close too. The current going through it is smoothed by the inductor, so it is much less of a problem, but there's no reason to go out of your way to find trouble.

Now that your Boost is laid out in a compact form, place the whole group of parts on your board where it needs to be, rotate if needed... and if you need to shove other parts out of the way, do it, but never break the link between MOSFET source and output caps.

Now, you can, if you want, add some star grounding on top... by putting the DC-DC in a corner of the board. Preferably as far as possible from stuff like ADCs and opamps. You can also locate the DCDC on its own ground island, however the cut you just made in the ground plane could turn into a slot antenna.

Adding a very cheap filter like a ferrite bead at the output will ensure the HF currents stay in the local loop, and do not travel through the ground plane to the decoupling caps located further on the output rail. This is not mandatory, but if your design includes sensitive analog parts, it is a plus, even if said Boost does not power these parts. What we're doing here is avoiding injection of high di/dt currents into the ground plane.

Note: for a Buck the nasty loops are at the input, so the focus is on connecting the input cap GND and the lower MOSFET/diode GND at the same point.

Example: using these techniques I have a board with a current shunt and a x20 differential amplifier (AD8210). The output has less than 1LSB noise on my 10 bit ADC, which means <100µV noise on the shunt. It sits squeezed between a H-bridge and two 250 kHz DC-DCs. Double sided board, ground on other side. Layout is the most important part of these things.


Not wanting to edit "peufeu" anwer, I provide this diagram to accompany that answer:


simulate this circuit – Schematic created using CircuitLab


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