About a year ago I designed a PCB with a processor and RAM (400MHz and 133MHz speed respectively). I did not know about length matching and it did not work properly. I then redesigned the board with length matched traces and it worked.

Now I have 3 questions.

  1. I am designing a PCB with an MCU and there will be JTAG, SPI, I2C and USB. Do they need length matching? (SPI should not need in my perspective but others might need).

  2. Since it is 4 layer would that be a problem if I pass traces below crystals (12MHz and 32.768kHz)? Would that trace affect crystals performance?

  3. I dedicated one layer to power from a Li-Po battery because there will be a huge amount of current draw. But I also need this layer for use with traces of some GPIO pins. Would that create problem?


1) It all depends on signal speed. For most JTAG, SPI, and I2C communication it is probably unnecessary, as these speeds tend to be fairly slow. USB, depending on the version, may require length matching (USB 3.0 is faster than 2.0, for example) but I have never had problems with unmatched USB traces. You could just run the signals as a differential pair to keep them roughly the same length. That way you can also control the impedance.

2) As long as you have a solid ground layer around and directly below the crystal (a pour on the same layer as the crystal, flooded around the entire connection to the processor, and a ground plane on the layer directly under the crystal) then you should be able to put signals on the other layers. Just make sure they're separated from the crystal by a ground plane.

3) I wouldn't anticipate any issues with placing some GPIO traces on the power layer. The important thing to watch out for is make sure that the traces don't cause the power plane to neck way down in any area. You also want to make sure that the pour is not forced to "detour" around your traces. You want the flow-through of your power plane to be direct and unbroken.

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  • \$\begingroup\$ Hi, thanks for response. For 2. question's answer. Then is it best to pour ground copper to the second layer (since everyting on 1st layer) then use 3-4 layer as a way i want should be fine. \$\endgroup\$ – snrIcmn Feb 17 '17 at 16:01
  • \$\begingroup\$ @snrIcmn Yes, but don't forget the ground pour on the 1st layer as well, around the crystal and the connections to your processor. You need a ground pour on the top layer and a ground plane on the second layer. Running traces on layers 3 and 4 should be fine. \$\endgroup\$ – DerStrom8 Feb 17 '17 at 17:09
  • \$\begingroup\$ Hi i need to ask you one more thing, should i always use the second layer as ground no matter what. Or is there any conditions that i should consider to do so.(Talking about circuit includes high speed or mcu etc not clasiccal analog circuit with a few regulators transistors etc.) \$\endgroup\$ – snrIcmn Feb 17 '17 at 22:11
  • \$\begingroup\$ There is nothing "magical" about the second layer being ground. You need to choose your layer stackup to meet your layout requirements. If you ever have to run controlled-impedance traces, you need to have them referenced to at least one ground plane on an adjacent layer. If you have anything that needs electrical shielding, you need to shield it using a ground plane on an adjacent layer. Any layer can be used as a ground, but you need to be smart and thoughtful about it to determine a location for the plane that makes the most sense. \$\endgroup\$ – DerStrom8 Feb 17 '17 at 22:58
  • \$\begingroup\$ You pick the plane layer(s) based on such things as effect on the sizes of any impedance controlled stuff on the layers using that plane as a reference (layer spacing has a large effect on trance impedance). It is worth also considering that a power plane can be a reference plane just like a ground plane. \$\endgroup\$ – Dan Mills Sep 6 '17 at 10:19

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