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I would like to design a RF power amplifier for an output power of 10 Watts. Since I would like to have a good efficiency, my amplifier should operate in the class F mode (or class E, whatever is easier do design). I have some experience with low-power amplifiers (class A and stuff), but I have never done a class F one. I found a PDF about class F amps:

http://www.highfrequencyelectronics.com/May11/HFE0511_Grebennikov.pdf

On page 5, it gives a design equation for the class F load network (equation 6). As far as I understand, the Z_net impedance depends on the supply voltage and the required output power. Assuming I use class F and the amplifier produces a perfect square wave, the fundamental amplitude is

$$ \hat{V} = \frac{4\,V_{DD}}{\pi} $$

and from this follows

$$ P = \frac{ 8\,V_{DD}^2}{\pi^2\,Z_{net}} $$

which can be solved for Z_net:

$$ Z_{net} = \frac{8\,V_{DD}^2}{\pi^2\,P} $$

Is my assumption correct? As soon as Z_net is known, one can design the transmission-line load network for the transistor. I would like to use the CGH40010 as well, which is used in the linked PDF. I made a PCB (on FR4) with the designed load network, but that amplifier didn't work because it oscillated.

a) am I doing things wrong with my load network, or b) is my calculation correct and probably just my PCB is crappy?

How should I proceed with the amplifier design? I purchased a book "RF Power amplifiers for wireless communication" from Cripps, as well as "Advanced techniques in RF power amplifier design" but both books were not of great use for my design, unfortunately.

The intended frequency is 2.2 GHz.

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    \$\begingroup\$ You'll need either ADS or NI AWR or other microwave engineering software, and the large signal S-parameters of the transistor you're trying to use to attempt to do load-pull measurements to verify the impedance of your output matching network is correct for as many odd harmonicas as possible - all need to be matched to maintain a "square" voltage waveform if you want to absolutely maximize the amplifier efficiency. You should read the chapter on class F, F^-1, and J amplifiers in Cripp's book again. \$\endgroup\$ Oct 18, 2019 at 14:21

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Oscillation is frequently a result of inadvertent coupling in the layout. A stability analysis of your design could tell you whether to expect oscillation with the chosen input and output terminations.

Cree provides a CGH40010-AMP demo board whose datasheet includes a schematic diagram and working layout. Though optimized for 3.7GHz, the input and output networks can be adapted for 2GHz operation using the provided device S-parameters.

The datasheet does not mention the amplifier's class of operation; you should be able to determine that from inspection of the output network topology. The >70% peak drain efficiency at 3.7GHz indicates that the conduction angle must be less than 180-degrees.

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