Does a 555 astable dissipate more power at higher frequencies?

Question

I'm planning on running a circuit on a 9V battery and it uses a 555 in the astable mode to generate pulses.

I want this circuit to be as efficient as possible, and not have to replace the battery very often if it can be avoided.

Looking at the 555 datasheet, the max power dissipation is 1180mW (page 4) -- but is this lower at smaller frequencies? Or is the chip designed to dissipate the same power at any frequency?

I can't find any graphs on the datasheet (p6-7) regarding power dissipation with frequency, which is why I'm asking :/

Answer 1

Yes it does.

Reducing the oscillation frequency \$f_{osc}\$ will have an impact on your circuit power consumption, because you'll be charging and discharging the capacitor less frequently, thus reducing consumption.

If you also want to reduce the current drawn by the 555 itself, then the first thing you should look after is lowering the supply voltage \$V_{cc}\$. The efficient way to do this is with a switching regulator to bring down 9V to 5V.

A lower \$V_{cc}\$ has the extra benefit of reducing the amount of charge required for the capacitor to achieve \$\frac{2}{3}V_{cc}\$, thus reducing the power consumption. You can have the best of both worlds and combine this with the reduction of \$f_{osc}\$.

EDIT:

As Jim Dearden has correctly pointed out in his comments:

1. Using the CMOS version of 555 will help in reducing the consumption of the IC.

2. On top of that, the CMOS version can work with higher values of the timing resistor than the bipolar version, thus making possible to reduce the value of the timing capacitor while keeping the same time constant. A lower valued capacitor stores less charge, thus consuming less current while charging up.

Double win for the CMOS version, which adds these benefits on top of those already achieved by reducing \$V_{cc}\$ and \$f_{osc}\$.

Note: selecting the highest possible value for the timing resistor in order to lower the value of the timing capacitor will always yield a reduction in current consumption, regardless of the version of the 555. So it should be considered for any design in which consumption is a concern.

Answer 2

The 1180mW is the maximum allowed power for not turning too hot under certain conditions. Most of the time, you don't have to care about this value, because it's always depending on trermal resistance on your pcb.

Table 6.5 are the electrical characteristics, there's mentioned, that the chip itself can draw 6mA/5V, 15mA/15V in the application. So you are far away from your 1180mW.

But please take care of the current flowing through the external components. (Resistors).

Maybe consider taking a microcontroller for your application. You can do lot of more things with your limited power.

Answer 3

Your bipolar 555 draws several milliamps when idle. CMOS circuits of the same complexity usually draw very low leakage currents (<1µA) when idle, and only draw significant currents when switching.

Switching in CMOS is similar to a capacitor charge/discharge. The amount of charge needed is proportional to supply voltage. Therefore, average current draw is proportional to Vsupply multiplied by switching frequency.

It is thus very desirable to lower the supply voltage. If you can use a chip that will run on an unregulated 1.8 ... 3.3V, then it will run on 2 AA batteries in series, which will take up about the same space as 9V battery.

However, the two AAs have about 4x the capacity in mAh, and lowering the voltage from 9V to 3V divides current consumption by 3x. This increases your battery life at least by 10x, easily. If you can do the rest of the circuit with 2 AAs, then do it. Also, 2AA are much cheaper than one 9V!

You can use CMOS like the CMOS 555, 4000 series, CMOS 74 series, or a modern microcontroller. Simply check that they are compatible with your supply voltage.

For example, 74LVC and ALVC operate From 1.65 V to 3.6 V. Many modern microcontrollers will also run on 2 AAs until they're thoroughly exhausted... even good old Atmega328P runs from 1.8 to 5.5, altough it's not an ultra low power device.

Using a DC-DC converter (switching or linear) is not always a good idea, as its idle dissipation can be much higher than what the circuit actually uses, unless it is designed for this specific purpose.

You can also run your 1.8V device from 2 AA using a micropower 1.8V LDO, which will lower voltage, and thus current draw, even more.

However... we don't know if your circuit will have some power-hungry loads, so more details would be needed.

Answer 4

Examining the 555 schematic, all the front end circuits operate at constant currents using resistors or shared-drain current sources. I don't think these will show much increase in current as Fosc rises.

However the output stage, uses a single node to control both pullup and pulldown circuits; classically that "single node" is the source for crowbar or shoot-thru charges for brief times where both circuits are transitioning between on/off and off/on. That node is at the bottom of R11.

Answer 5

Does a 555 astable dissipate more power at higher frequencies?

generally yes, for two reasons:

1) the chip itself will dissipate more power. the bjt version will need to annihilate charges / holes and the cmos version will have to charge up / discharge those little capacitance more frequently;

2) the output devices will dissipate more power: maybe you are driving a mosfet, or a bjt, or a resistor / capacitor....

It is very rare that everything else being equal, power dissipation goes down with frequency.

so if you care about power consumption,

1. look into newer / specialty chips;

2. run it at as low of a frequency as possible;

3. try to find the cmos version.

each comes with its own disadvantages, however.