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I'm planning on running a circuit on a 9V battery and it uses a 555 in the astable mode to generate pulses.

I want this circuit to be as efficient as possible, and not have to replace the battery very often if it can be avoided.

Looking at the 555 datasheet, the max power dissipation is 1180mW (page 4) -- but is this lower at smaller frequencies? Or is the chip designed to dissipate the same power at any frequency?

I can't find any graphs on the datasheet (p6-7) regarding power dissipation with frequency, which is why I'm asking :/

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  • \$\begingroup\$ without a complete circuit that shows what you've attached to your 555, how should we help you? Anyway, it's pretty certain the 555 is not the clutch you need when designing a low-power device. However, since you forgot to explain what kind of pulse you need for what purpose, it's impossible to help you :( \$\endgroup\$ – Marcus Müller Feb 18 '17 at 12:24
  • \$\begingroup\$ @MarcusMüller sorry, I guess the question is kind-of vague :/ I'm generating pulses to clock a 4520 Binary-Up counter and using an AND gate to reset the counter when the 8 and 4 bits are HIGH, I'll try making a circuit diagram (I only have a system diagram atm) to better explain. \$\endgroup\$ – ᔕᖺᘎᕊ Feb 18 '17 at 12:29
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    \$\begingroup\$ what's the purpose of all this? The 555 datasheet says it has a pure supply current (not doing anything) of about 5mA, add the the current of the 4520, and you end up with 6 mA or more – any microcontroller you can buy these days will consume less and be able to do much, much more. \$\endgroup\$ – Marcus Müller Feb 18 '17 at 12:35
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    \$\begingroup\$ Better to use the CMOS version of the 555 if power is the issue - it also give better frequency performance \$\endgroup\$ – JIm Dearden Feb 18 '17 at 12:48
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    \$\begingroup\$ More switching means more charge has to be moved in and out of transistors in order for them to change state. Moving charge requires work. So, it appears reasonable that at high frequency the circuit will draw more power. How much, and if it is even detectable is another matter. \$\endgroup\$ – Sredni Vashtar Feb 18 '17 at 13:12
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Yes it does.

Reducing the oscillation frequency \$f_{osc}\$ will have an impact on your circuit power consumption, because you'll be charging and discharging the capacitor less frequently, thus reducing consumption.

If you also want to reduce the current drawn by the 555 itself, then the first thing you should look after is lowering the supply voltage \$V_{cc}\$. The efficient way to do this is with a switching regulator to bring down 9V to 5V.

A lower \$V_{cc}\$ has the extra benefit of reducing the amount of charge required for the capacitor to achieve \$\frac{2}{3}V_{cc}\$, thus reducing the power consumption. You can have the best of both worlds and combine this with the reduction of \$f_{osc}\$.

EDIT:

As Jim Dearden has correctly pointed out in his comments:

  1. Using the CMOS version of 555 will help in reducing the consumption of the IC.

  2. On top of that, the CMOS version can work with higher values of the timing resistor than the bipolar version, thus making possible to reduce the value of the timing capacitor while keeping the same time constant. A lower valued capacitor stores less charge, thus consuming less current while charging up.

Double win for the CMOS version, which adds these benefits on top of those already achieved by reducing \$V_{cc}\$ and \$f_{osc}\$.

Note: selecting the highest possible value for the timing resistor in order to lower the value of the timing capacitor will always yield a reduction in current consumption, regardless of the version of the 555. So it should be considered for any design in which consumption is a concern.

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    \$\begingroup\$ As the 'someone' who pointed it out I'd also point out that using the cmos 555 allows you to reduce the value of the timing capacitor by using larger timing resistors for the same frequency thus reducing the charge per charging cycle and therefore power consumed in both chip and timing elements. \$\endgroup\$ – JIm Dearden Feb 18 '17 at 19:06
  • \$\begingroup\$ Nice answer +1 from me \$\endgroup\$ – JIm Dearden Feb 19 '17 at 15:51
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The 1180mW is the maximum allowed power for not turning too hot under certain conditions. Most of the time, you don't have to care about this value, because it's always depending on trermal resistance on your pcb.

Table 6.5 are the electrical characteristics, there's mentioned, that the chip itself can draw 6mA/5V, 15mA/15V in the application. So you are far away from your 1180mW.

But please take care of the current flowing through the external components. (Resistors).

Maybe consider taking a microcontroller for your application. You can do lot of more things with your limited power.

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  • \$\begingroup\$ Thanks! Looks like I misunderstood the datasheet in the first place (I don't really know what I thought before... :/), but this answer clarifies a bit in my mind about what some of the numbers in the datasheet actually mean! \$\endgroup\$ – ᔕᖺᘎᕊ Feb 18 '17 at 12:42
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Your bipolar 555 draws several milliamps when idle. CMOS circuits of the same complexity usually draw very low leakage currents (<1µA) when idle, and only draw significant currents when switching.

Switching in CMOS is similar to a capacitor charge/discharge. The amount of charge needed is proportional to supply voltage. Therefore, average current draw is proportional to Vsupply multiplied by switching frequency.

It is thus very desirable to lower the supply voltage. If you can use a chip that will run on an unregulated 1.8 ... 3.3V, then it will run on 2 AA batteries in series, which will take up about the same space as 9V battery.

However, the two AAs have about 4x the capacity in mAh, and lowering the voltage from 9V to 3V divides current consumption by 3x. This increases your battery life at least by 10x, easily. If you can do the rest of the circuit with 2 AAs, then do it. Also, 2AA are much cheaper than one 9V!

You can use CMOS like the CMOS 555, 4000 series, CMOS 74 series, or a modern microcontroller. Simply check that they are compatible with your supply voltage.

For example, 74LVC and ALVC operate From 1.65 V to 3.6 V. Many modern microcontrollers will also run on 2 AAs until they're thoroughly exhausted... even good old Atmega328P runs from 1.8 to 5.5, altough it's not an ultra low power device.

Using a DC-DC converter (switching or linear) is not always a good idea, as its idle dissipation can be much higher than what the circuit actually uses, unless it is designed for this specific purpose.

You can also run your 1.8V device from 2 AA using a micropower 1.8V LDO, which will lower voltage, and thus current draw, even more.

However... we don't know if your circuit will have some power-hungry loads, so more details would be needed.

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Examining the 555 schematic, all the front end circuits operate at constant currents using resistors or shared-drain current sources. I don't think these will show much increase in current as Fosc rises.

However the output stage, uses a single node to control both pullup and pulldown circuits; classically that "single node" is the source for crowbar or shoot-thru charges for brief times where both circuits are transitioning between on/off and off/on. That node is at the bottom of R11. enter image description here

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  • \$\begingroup\$ Sorry, I'm pretty much a beginner in all this, and I kind-of lost you from "classically that "single node"..." -- please could you explain it a bit more? :) (+1 though!) \$\endgroup\$ – ᔕᖺᘎᕊ Feb 18 '17 at 12:48
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    \$\begingroup\$ Suppose Q23 is off. The base of Q27 will be close to +5v (no leakage thru R11), base of Q28 near +4.5 volts (little current flowing, so only 0.5v across its EB), and Vout measured with 10MegOhm meter is near 4.0 volts. As Q23 turns on, there comes a time when both Q26 and Q28 are ON. Huge currents flow straight from VDD to GND. A brief time. \$\endgroup\$ – analogsystemsrf Feb 18 '17 at 14:02
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    \$\begingroup\$ For fun, simulate this with a RAMP input. Watch how Q24 provides a snapping behavior to the behavior, by adding positive feedback which reduces the time spent in the high-current region. \$\endgroup\$ – analogsystemsrf Feb 20 '17 at 1:28
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    \$\begingroup\$ Correction: when Q23 is off, the base of Q27 is at +5volts, with its emitter at +4.5 (set by how much current the meter or scope is demanding). You only observe Q27 emitter thru R12, and at 3.9KOhms, a 10MegOhm measuring tool only drops 2 milliVolts. Thus the OUTPUT, emitter of Q28, is only 2 millivolts below the base voltage. Summary: for low leakages, Vout becomes very close (0.2---0.5v) to +5v. \$\endgroup\$ – analogsystemsrf Feb 22 '17 at 4:34
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    \$\begingroup\$ If you are curious, consider the 555 circuitry prior to Q23, and think about how that works. Then provide your analysis (without running a SPICE sim, only your brain and a sheet of paper) in form of a question to StackExchange. \$\endgroup\$ – analogsystemsrf Feb 24 '17 at 3:03
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Does a 555 astable dissipate more power at higher frequencies?

generally yes, for two reasons:

1) the chip itself will dissipate more power. the bjt version will need to annihilate charges / holes and the cmos version will have to charge up / discharge those little capacitance more frequently;

2) the output devices will dissipate more power: maybe you are driving a mosfet, or a bjt, or a resistor / capacitor....

It is very rare that everything else being equal, power dissipation goes down with frequency.

so if you care about power consumption,

  1. look into newer / specialty chips;

  2. run it at as low of a frequency as possible;

  3. try to find the cmos version.

each comes with its own disadvantages, however.

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