In I2C, why SCK and SDA should be open drain? What will happen if they are not open drain. I am trying to implement I2C communication using bit banging. Should I enable Open drain circuitry of GPIO pins for SCk and SDA? I am asking this may be because I dont know about open drain logic.
I²C is not a strict master-slave protocol (although your circuit might use it this way), but allows multiple masters, and allows slaves to delay transactions by clock stretching.
This means that multiple devices can drive the same signal line at the same time. And if two devices try to drive different levels, the result would be bus contention, which would not only make the actual level undefined, but also would form a short between VCC and GND which could burn out the output transistors of these devices.
In an open-drain system, if one device pulls the bus low while another device lets it float high, the result is a low signal. This is used by the I²C protocol to detect conflicts in a multi-master system, and to let the master detect when a slave pulls the clock low to delay it.
If you have only a single master, and if your slaves do not support clock stretching, you can use a push/pull output for the clock line. But the data line is written and read in the same transaction, so you must never actively drive it to the high level.
Use op open-drain outputs on I2C devices is required to avoid bus contention. Any device must be able to try to transmit at any time without the risk of damaging itself or other parts. Another requirement is the external pull-up resistors (typically 4.7k). A device would check that the data line is high before using the bus. If two more more devices try to transmit by making the data line outputs, but they are both open drain, no damage can happen, only incorrect data.