How do I generate a .JED file for programming an ATF750C using VHDL language?

Question

I know how to program regular PAL/GAL22V10 chips and I am interested in using the enhanced Atmel ATF750C CPLD device because it seems 100% pin- and voltage-compatible with the PAL/GAL22V10 chips. I also know my programmer supports those chips.

The problem is that I do not know how to generate .JED files specifically for the 750C devices using VHDL. Atmel only provides examples using PLD, but the problem using PLD is that we have to work with the details about the inner working of the chip which is not necessarly needed. (It's like programming something in assembly when you could do C).

I'm looking for a GNU solution if such a solution even exists at all.

Answer 1

Use WinCUPL, available free on the Atmel web site, as is done with all Atmel programmable logic:

http://www.atmel.com/tools/WINCUPL.aspx

I found this answer in a few seconds with Google. You could have done the same.