PCB design for current shunt monitor

Question

I was looking at the INA225 datasheet and wondering how to appropriately design the PCB for this device.

My question is rather simple, the shunt resistor will be far away from the microcontroller and there will be switching regulators along the way, and I want to avoid using an external ADC, so I have two options:

1) Place the INA225 close to the shunt resistor and route the analog output to the microcontroller.

2) Place the IN225 close to the microcontroller and route the kelvin connection like one would route a differential pair.

I'd like to know which one is better considering since the signals may pick up a lot of noise along the way. If possible, please provide explanations on why one approach is preferable over the other.

Answer 1

The standard rule of thumb when amplifying sensors is to put the op amp as close to possible to the sensor, because the op amp has a lower output impedance than the sensor and so a given noise power will produce less noise voltage.

With a shunt resistor, though, the output impedance of the shunt is likely lower than than that of the op amp. This would argue for the long trace being between the shunt and op amp. However, the signal amplitude from the shunt is also much smaller, or else you wouldn't need an amplifier. Since any noise on the amplifier input will be multiplied by the gain, the tradeoff becomes a matter of comparing the impedance ratio with the gain.

All the typical advice about reducing noise still applies, of course, and will likely matter more than the amplifier placement: low-pass filtering, shielding, attention to grounding and current loops, etc. Your noise is going mostly to depend on the bandwidth you need for the current measurement.

Answer 2

Traces from shunt to amplifier must be routed as a differential pair to reject interference.

Now, your current sense amplifier has a "REF" input pin, to which the output is referenced. Wether you choose to place your INA close to the micro, or close to the sensor, keep in mind this: if REF is connected to GND at the INA, then any noise in GND between this point and the ADC's GND will be added to the measurement.

REF should be connected to the ADC's GND pin (in this case, the microcontroller).

This means you can also route these 2 signals (INA output and REF) as a differential pair, because this is what they are. They carry a voltage difference.

Now, where to place the INA? This is hard to say without seeing your board. If you stick it right next to the shunt, but then it sits next to a DC-DC and you power from a nearby dirty rail... maybe a bad idea. But tiny voltages on long traces in a noisy environment isn't that good either.

I'd place it as reasonably close to the shunt as possible, but I'd be wary of GND noise. Some filtering on the inputs can't hurt, but beware where you connect anything labeled GND, like the bottom end of those filter/decoupling caps and of course the INA's GND... make sure it doesn't sit on a minefield of DC-DC ground noise. Like, in the current path between the DC-DC input and output caps and low-side MOSFET...

And a ferrite bead + cap in the supply could help, too.

Remember your nice INA might have 100dB CMRR at DC... but it has 0dB CMRR/PSRR at 1MHz.

If your signal is slow and polluted with HF spikes, a simple RC filter at the ADC input can also work wonders.

Answer 3

Lets add a (3rd) option: introducing some filtering, with some judicious placement of ADC and filters. After 10 minutes with Signal Chain Explorer, here is a topo with dual 10Hz LPF (each 15K Ohm & 1UF); the 2nd LPF is placed only 1mm from the ADC, to minimize the Loop Area for Hfield induced errors. You edit the 100mm trace by clicking on it, disabling "Inherit system-wide values", clicking Wiring Wizard, click "next" and you'll see the 5 dimensions for each trace. Make the length be 100mm, and click "solve" and "save". Then "update"

I selected a high-gain opamp, so the gain-of-1000x is also precisely achieved near DC.

You likely need a trace, from Shunt to the first LPF, of length other than 100mm. Here is how to edit

Even with these LPFs, and the 2nd LPF right against the ADC/MCU pin, Hfields are still a problem. Here is the list of induced voltages, even after LPF(s). NOTE: that short trace into ADC is still the culprit.

How to achieve this filtering, differentially?

^{simulate this circuit – Schematic created using CircuitLab}

Here is the tool's builtin Magnetic-field HFI database:

The tool has Gargoyles Mode active, with 4 interferers: HFI (we use that here), EFI, PSI and GPI. The GPI can also be activated, thus implementing Ground_noise between the Av=1,000X Instrumentation Amplifier and the ADC Gnd.