I am designing SAME70 board with space quite limited, using LFBGA-144 package. According to datasheet it is recommended to place decoupling capacitor nearest to the concerned pin. Due to space limitation I can't use separate capacitor for each line. Is it possible to use one consolidated capacitor for decoupling purpose? The capacitors recommended are MLCCs or tantalum. I'm not going to use tantalum and instead of MLCC I want to try out the new Low ESL NFM series that would reduce the number of these bulk capacitors by approximately 10 and in my case I'll use one instead of using 6. Is it possible that reducing the capacitors per pin affect the performance of my chip if the capacitance of the consolidated capacitor is equal to the sum of the capacitors recommended by the datasheet? I'd like to know beforehand if it would. Thanks waiting for reply.
The absolute best approach is (as mentioned in the datasheet for the MCU) to place at least one decoupling cap as close as possible to one power pin. The capacitor should be as stated in the datasheet!
This is a way for the vendors to get insurance if the MCU misbehaves when doing something in some situation while having a particular configuration and while using a specific power source etc.
The further you get from this ideal situation, the more likely the MCU will fail under certain circumstances.
Theoretically, the changes that you suggest do not sound very good to me. For example, six 100nF capacitors is not the same as one 600nF. The reason for this is that the discharge curve is not proportional.
If you ask me if your suggested changes would work for majority of the use cases, then the answer is very likely. As with everything else dealing with the complex subject of electronics, the best thing is to test it out yourself.
The idea behind using multiple capacitors is to reduce the impedance to the energy storage, the capacitors, as seen by the consuming chip. A capacitor has series resistance and inductance, inherent to the material and the package. By using multiple capacitors in parallel these unintended 'parasitic' resistances and inductances are effectively paralleled, meaning they are lowered. Thus the overall impedance seen by the consuming chip is lowered.
This is something a single "bigger" capacitor cannot provide as the series inductance will be higher. Your microcontroller, if it is small, might work well with a single large capacitor if it is close enough, but you might run into relability issues and electromagnetic compatibility engineering issues down the road if this is a professional product, try to stick to guidelines if possible here.
The NFM series are feedthru caps more normally used for supply filtering then decoupling.
If you are using a BGA package you probably have a buried power and ground plane so you can tie power and ground pins down to the appropriate plane with a local via per pin then you can somewhat afford to skimp a little (The planes have low inductance), 0402 or similar MLCCs under the package are common, with bulk cap from a 10u or so high K part anything up to an maybe 25mm away (as long as you can make the power plane area big enough).
You mention tants, which classically are low frequency parts which can be placed at some distance from the pins, it is the small ceramics that must be reasonably local to the power pins, and I would bet that that datasheet calls for both types, not one or the other. Personally I dislike tant caps, and would generally use on of the modern high K MLCCs instead (possibly with a 0.5 ohm series resistor to lower the Q), but watch the capacitance/voltage curve with high K parts in small packages....
Generally the approach is to over do the decoupling, but without running an (expensive) PDN model, that is the way to bet, the datasheet recommendations will work at the outer limits of temperature, with pathological applications, and with layout done by a monkey, you can reduce it but will want to do a lot of analysis and testing first.