I noticed that the actual integrated circuits of processors, GPUs, ROMs, specific integrated circuits and other ICs are very small but they usually come in a package that is much bigger. What is the purpose of the packaging? And what are the materials that IC packages are made of?
3 Answers
What is the purpose of the packaging?
- Protecting the IC against light (light will induce current flow in a PN junction)
- Protecting the IC against moisture
- Together with the leadframe take the connections of the IC further apart. These can be as closely spaced as 100 um which is too close for standard cheap PCB manufacturing. The leadframe + package expands this to something more usable like 0.4 mm up to 2.54 mm (DIP/DIL packages)
- Make the IC easier to handle by humans. A DIP package can easily be used and exchanged in a breadboard or in a socket.
And what are the materials that IC packages are made of
The leadframe: tinned copper or metal so that it can be soldered easily
The black part: usually molded plastic, sometimes a ceramic material.
Some ICs can be bought in a CSP (Chip Scaled Package) which actually means no real package at all, on top of the chip a redistribution layer is made (which spaces the connections to what the PCB can use) and the IC is then mounted directly on the PCB. This technique is also called "flip chip".
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\$\begingroup\$ NXP on the subject of CSP: nxp.com/assets/documents/data/en/application-notes/AN3846.pdf . Another compact choice is "COB", chip-on-board: learn.sparkfun.com/tutorials/how-chip-on-boards-are-made \$\endgroup\$– pjc50Feb 22, 2017 at 14:48
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\$\begingroup\$ I thought the plastic bodies were cast epoxies not moulded - wouldn't plastic flowing under pressure in a mould damage the bond wires? \$\endgroup\$ Mar 1, 2017 at 9:29
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\$\begingroup\$ wouldn't plastic flowing under pressure in a mould damage the bond wires? No it doesn't apparently. If the housing was a cast epoxy then there would need to be some free space for the bondwires. Which there isn't. The plastic just flows around the bondwires and does not misplace or damage them. I'm sure because this is how the ICs I design are packaged. \$\endgroup\$ Mar 1, 2017 at 9:43
In most cases, the extra packaging is needed only to attach pins and bond the pins to the die. A lot of more modern packages are much smaller because they don't use older DIP pin size/pitch standards. For example QFN, LGA, BGA, etc. have small packages because the pins/pads/balls are close to the die. Indeed some packages are practically balls bonded directly to the bare die.
This site describes the process in much more detail (and you can find a lot of other information online). The encapsulant as it describes, are generally epoxies.
http://electroiq.com/blog/2005/08/materials-and-methods-for-ic-package-assemblies/
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5\$\begingroup\$ Thermal management can also play a role in the package design. See 'heat spreader', or other related topics. Further, legacy products will come in legacy packages, even if the actual process technology has advanced. 74LSXXXX chips inside the DIPs used to be much bigger than they are now, but the package remains the same. \$\endgroup\$ Feb 22, 2017 at 15:06
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\$\begingroup\$ I think the next question is, why do CPUs have so many pins. Why couldn't all the power pins be replaced with, say, a molex connector, with power distribution to the chip's inputs done within the package? \$\endgroup\$ Feb 22, 2017 at 21:32
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1\$\begingroup\$ @Random832: Because you need power on the chip in many places and transferring it from one end of the chip to the other would be hard? 65W at 1V is a current of 65A, you need quite some copper wires for such currents. There are also memory interfaces with lots of wires. \$\endgroup\$– MichaelFeb 22, 2017 at 21:44
If you have ever tried to set up an ultrasonic microwirebonder, you'll get it. After days of fiddling to get the right temperature, humidity or something, stiffness of the custom made chip holder jig, it works and the thing machineguns away like a glorified sewing machine for gold wires. Best get a million similar chips through before the weather changes, or a dark lord of Sith raises an eyebrow, or any of the other things which go wrong with these. Since the exact successful process condition will change with different die sizes, one needs to get a lid and legs over it which won't fall off and won't need such inconvenient setting up to make connection to. Lid and legs which will wet and contact with standard tin solder wave process are already plenty enough reason to want to work with packaged chips.
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\$\begingroup\$ It sounds like you've used one in a prototyping/acedemic setting like I have. Even the same wire bonder would behave much better in the controlled conditions of a fab -- cleaning processes, rate of wire consumption (it anneals), etc. But your point is well made, wire bonding isn't something you'd want to do every time you built a circuit (and it's fragile even when it works well, so you'd have to encapsulate) \$\endgroup\$– Chris HFeb 22, 2017 at 16:33