I undesrtand that ground plane should be continuous so return current will follow right path so no delay and additional noise voltage along with the reduction of empedance which is good and necessary thing especially for high speed.(If anything wrong or lack in this part please let me know)

What bothers me is this: Ground plane has many functions but why do i have to allocate a second layer for vcc plane. If i do then i wont have enough room for wiring in 4 layer since 2 of them already gone for vcc and ground.

Cant i just allocate one layer to continuous ground and use rest for proper trace wiring. And I will draw vcc traces thicker based on current required. I am confused because everyone says allocate power plane besides ground but in high level designs i saw like this a10-proto kicad there is no power plane only continuous completely allocated ground plane and other layers are for wiring. And they wired power traces with thick wires.

Could you provide me some insight please.

  • \$\begingroup\$ Why can't you run your traces on plane 1 (and 4)? \$\endgroup\$
    – Tyler
    Feb 22, 2017 at 23:24
  • 1
    \$\begingroup\$ This is not a specific case. I just want to learn from ones who have more experience than me. I want to verify things that i read or know. And in one design things got compilacated and vcc copper was too much it is another reason. \$\endgroup\$
    – user139552
    Feb 23, 2017 at 0:34
  • \$\begingroup\$ You don't have to allocate a plane for supplies at all. If you dont have many voltage rails you could lay the power as traces. \$\endgroup\$
    – Mike
    Feb 24, 2017 at 16:24

1 Answer 1


The ground plane is most important, as you recognized. Not only does it allow the shortest return path, but the lowest impedance, and it also creates minimal loop current which reduces EMI.

The next most important is often the power plane(s). Usually, once you go to 4-layers, and assign two of them as ground and power, it frees up a lot of routing on the top and bottom layers that you don't need to use the middle planes for routing. But if it gets tight, yes you can use the power plane for routing some traces. Often you will have circuits with multiple power rails, and in that case usually the power plane is split into different domains, e.g. the MCU may sit on a section of the board where the power plane is at 3.3V, where other parts of the board are at 12V for I/O.

If the density of the board increases to the point that you find you need more internal layer routing, it might be advisable to go to 6 or more layers.

Again, for most low to medium density boards, having two layers just for routing is usually enough, if your routing strategy is sound. So if you feel you need additional layers and you aren't packing 0402 or smaller parts close together, then maybe there are better ways to route the traces. If you do want to put some routing on the power plane (and you can also use the ground plane but I would try to avoid that), just be careful that you aren't cutting of or overly-restricting current paths.

And finally, yes, you could just use one ground plane and three routing layers, if you feel you need more routing area but not enough to justify 6-layers. So you would just route the power traces as you would normally on a 2-layer board. Or you could route your signals, then do a copper pour of the power rails in the remaining area. Remember again to check the current paths. Usually you route the power traces anyway to be sure you can get sufficient trace widths through everywhere, and maybe do a DRC, then pour the remainder.

EDIT: Further explanation of the return path. Current will return along the path of lowest impedance. In DC or low-frequency circuits, impedance is essentially just the resistance, so current follows the path back with the lowest resistance. This is usually a ground trace or ground plane. Current doesn't jump through the air to return on a power trace just because it's closer.

However, when dealing with higher frequencies, impedance is more than just resistance, it includes inductance and capacitance. Now, the capacitance of a trace will be influenced by a nearby power plane.

If you want to calculate characteristic impedance for example of a 4-layer board with internal ground and power planes, the calculation considers the closest 'reference' plane, which could be either. So if it is a symmetrical stack up (with equal height from top to first plane as from bottom to second plane), then the impedance of a given track would be the same. But this assumes the tracks are carrying high-frequency signals, such as USB, Ethernet, etc.

This is where perhaps the confusion in what you have heard or read comes from. It's sometimes difficult to expand basic electrical theory from the Ohm and Kirchhoff laws, to high-frequency AC circuits, from the DC or time domain, to the frequency domain.

  • \$\begingroup\$ Thanks a lot AngeloQ. Mostly vcc is not a specific voltage as you indicated (3.3v 5v 1.8v etc.) So i must divide power plane to different voltages. I read that when signal close to power plane than ground plane the return current will be on power plane. Isn't this a problem since signal will pass through differnt voltage blocks. Actually that is why i am a little bit scared from power plane since ground is one huge continuous plane but power plain is mixed. Lastly could you give me a source to understand how to do this properly "not cutting of or overly-restricting current paths." \$\endgroup\$
    – user139552
    Feb 23, 2017 at 0:54
  • \$\begingroup\$ The electrical return path will usually be ground, even if there is a power plane closer, which is why the ground is so important. When it comes to shielding from crosstalk sometimes you will see it shown that you can use ground OR power traces between signal traces, but this doesn't mean the signal return path is the power trace. The current path along the signal and back along the return path creates essentially a loop antenna. \$\endgroup\$
    – AngeloQ
    Feb 23, 2017 at 1:20
  • \$\begingroup\$ Here is a good resource, and here is another that goes into split planes and some of the issues I mentioned. (vias are usually the main cause of restrictions in split power planes.) This is an image I found online that demonstrates a split plane getting restricted by a high number of vias. You can see how little cross-sectional copper area there is for current to pass from one side to the other. \$\endgroup\$
    – AngeloQ
    Feb 23, 2017 at 1:20
  • \$\begingroup\$ Thanks a lot again :) So finally, i can divide power plane into different voltages(3.3 5 1.8 1.2) and without cutting of or overly-restricting current paths i can draw lines on taht layer too if necessary \$\endgroup\$
    – user139552
    Feb 23, 2017 at 1:50
  • \$\begingroup\$ I don't know the details of your circuits, but as a generalization, yes. \$\endgroup\$
    – AngeloQ
    Feb 23, 2017 at 3:55

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