Modern desktop CPUs like Core i7 spend a huge amount of transistors on:
Cache! 1 bit of SRAM usually needs 6 transistors... Think about 8MB = 64 Mbits of L3 cache, plus L2 cache, plus L1, plus support logic, smart cache coherency hardware, concurrent accesses, etc... On modern cpus, cache uses a large part of the die (and it should, since provides a huge performance advantage).
Being compatible with a huuuuuge instruction set (from 8086 to the latest SSE) complicates matters
This is horribly complex, as a i7 cpu from this year needs to reorder and optimize instructions which were compiled for optimum performance on an older cpu which might have completely different internal architecture...
High clock frequency and long pipelines add lots of registers
Plenty of hardware-inefficient yet juicy little optimizations which are needed to get those sexy marketing numbers.
Throw in a GPU, multichannel DDR controller, busses, bla blah and you get into the 1-2 billion transistors for a Core i7.
Now... if you aimed for a different price/power/performance compromise...
Shrink the caches, shrink the memory busses, reduce core count, lose many nifty but complex performance optimizations...
You get Intel Atom: 47M transistors. 20-40x less than i7!
If you could forget about backwards compatibility... if you could
recompile your code specifically for that CPU, then you could ditch most of the smart hardware bits and implement them in the compiler instead. Stick your DDR chip on top of the CPU with 3D stacking, thus ditch the long IO traces and corresponding IO buffers, reduce latency...
Tada! You got an ARM spartphone cpu. Cortex A15, 20-30M transistors, with excellent performance per watt and per dollar.
Good old 68k used... 68k transistors.
On the very bottom end of the scale, you got Cortex-M0 which has about 12k gates I believe (you can convert this to transistors). It is smaller than 1mm2. Ironically, if built on a modern process it will be much smaller and cheaper than the 8-bitters...