# PCB Return Current Path Question

I understand that the return current will use the closest plane to the signal trace. So could you give me answers on these 2 specific conditions.

1)When we have lets say 4 layers where layer 1 2 3 are signal layers and continuous ground plane is at 4th layer. For all 3 layers' signals the return current path will be on 4th plane right since there is no other plane.

2) Now for second case, the 4 layer stack up is signal ground-plane signal signal. Assume that layer 3 have signal traces but i also poured copper for some vcc rails on some areas of layer 3 (not completely). Then if i draw a signal trace in 4th layer, will the return current be on ground plane at layer 2 or the partial copper pour on layer 3 for trace passing under partial copper pour and trace not passing under partial copper pour.

I hope i am clear.

• It would be clearer if you posted some pics. Also: is a PCB intended for high-speed signals? If not, keep in mind that the return current (and in fact, any current) always follows the path of least impedance. – Enric Blanco Feb 23 '17 at 22:56
• For DC and low frequency stuff (<few MHz/>few hundred ns long switching edges, not too much RF magic to worry about) the ground plane will be the return path. Once you get into the VHF range, the return path is usually the path of least impedance. If your vcc plane has lots of ceramic decoupling then the return current will flow along the closest layer (that either has good capacitive coupling to ground or is ground) – Sam Feb 23 '17 at 22:57
• @Sam I dont know how the decap. capacitor has affect on return current since return path is a huge road and capacitor is at near of pin. Only thing i know about dec. cap. is that they have freq. characteristics so by connecting a few of them parallel we are getting low impedance and they provide more constant voltage level we want. – snrIcmn Feb 23 '17 at 23:13
• @Enric Blanco So in this case since a continuous ground will probably have the lowest impedance then it will be our return current path since a partial copper pour on any layer cannot have lower impedance than a fully poured ground layer right – snrIcmn Feb 23 '17 at 23:15
• @snrIcmn Yes, but how you reach each plane (vias) will have far more impact on impedance that the copper pour on the planes themselves. – Enric Blanco Feb 23 '17 at 23:22