For example, hard drives can be 320GB (between 2^8=256 and 2^9=512) in size, whereas memory appears to be limited to sizes of power of 2.
The answer to this is hinted at in a similar question on Superuser.
- Memory DIMMs connect directly to the CPU.
- There are usually multiple memory modules (but there can be only one).
- Multiple modules combine to make one linear address space, e.g. 0-8GB.
- Memory is accessed directly by the processor, which has special hardware to speed up access.
Therefore it is advantageous to tie memory access to dedicated hardware that can quickly switch between multiple modules. By using powers of two it's possible to build dedicated circuitry in the easiest manner.
- Hard drives do not connect directly to the CPU.
- Hard drive volumes are not typically addressed directly. There is a file system and maybe other logical abstractions like LVM, RAID, etc.
- Even in configurations where multiple drives are used (e.g. striped RAID) you never read "off" the end of one disk and into another. Multiple drives do not combine into a linear address space.
Therefore it makes little sense to tie hard drive sizes to a power of two. Access to the raw hardware is already slowed slightly by lots of other factors, creating fancy hardware optimised to a power of two is not going to help.
Hard drives consists of plates, each with circular tracks, each filled with sectors. Number of tracks is limited by radius of the drive, number of plates is limited by heigh of the drive and number of sectors on track is limited by how many you can reliable write and read on such size. (more or less, now it is much more complicated, but who cares).
Any of the above is not related to the power of two, so the result of multiplying is usually also not a power of two.
As for memories, they are also not limited to power of two, but they anyway usually are produced such, that the capacity is the power. It is related to the fact, that you have to address the memory by memory lanes (wires), which can be just on or off, so the limits for memory was set on the number of wires before, and with newer protocols it is still related to the length of possible address, which is power of two, as it is binary number. The memory itself just cannot exceed the limit, but can be smaler. The main restriction here is, how many silicon you are willing to use and how good technology you have. As internaly it would do a lot selecting based on the power of two too, it makes sence to use some "rounded" number - some power of two - to use all the gates optimally and not have problems with alignment and with detecting, if address is or is not in reachable range - if the address is not longer then your internal bus (which is power of two), then it fits, if is longer, it is out - totally simple logic and many times also make impossible by construction to address more, than exists inside.
As silicone is cheap (relatively) and the complexity does grows with wider busses mainly, it is better to use the power of two as your memory size, than any other number. So nearly any manufacturer does that.
Also for programs/OS/whatever is more easier to use memory going from zero without spaces to some multiple of power of two (actually to small multiple kilobytes, megabytes, gigabytes etc).
Disk drives have serial data on moving media, and there is no requirement in serial data access that the start and stop of the data be reached by dead-reckoning. So, you don't need to know the address beforehand, just know how to recognize it when you pass it (after you pick the right track on the disk, anyhow). Directions to find data on a hard disk are something like 'look on platter four, the 220th track from the center, and find the sector labeled '0x333'.
Other than knowing one disk from another, some limited number of bits to select the platter and track (those are 'cylinder' addresses), and another limited number of bits to find the sector, your addressing is free-form. Nothing is lost if a sector or block tests bad, one can just move the sector labels around to a good spot on the disk.
For random-access (RAM), however, it is a programming and hardware imperative that some address-format be immediately presented by the CPU and recognized by the RAM memory bank, and cell within that bank, and it has to be done in HARDWARE for speed. So, 64-bit CPUs think some sizeable chunk of address space is their contiguous working storage. It all has to be there, reporting back data (or accepting written data) with minimal delay. The poor memory controller has to know how to make a solid wall of data out of the 'bricks' of contiguous storage of its DIMMs. It does this, because the DIMMs all come in standardized sizes.
The power-of-2 limitation on memory module sizes means that the memory controller's hardware can easily remap addressing of a mixture of modules into a contiguous physical-address region in the 64-bit memory address space.