I'm new to PCB design and I'm trying to achieve my first four-layer PCB.

Inner layers are GND and Vcc planes filled entirely with copper.

I need to use a via to wire a USB signal (tx, rx) from the top layer to the bottom layer. My default clearance for trace/spacing is 0.1 mm/0.1 mm, and the drill size is 0.2 mm.

I wanted to know if I could lose the USB signal if I keep a 0.1 mm clearance for Vcc and GND planes copper.

Is there a safe clearance for via wiring a USB signal or any other signals?


2 Answers 2


As a newbie, you are either doing a advanced board as your first project, or you are using unnecessarily thin trace and space widths. Your 0.1 mm comes out to only 4 mil. Unless you have a reason for that, 8 mil is more universally manufacturable or without additional cost. Unless you're using large BGA packages, there should be little need for your tight minimum width and space.

Another issue is using a whole plane for power. Yes, I know there is a lot of knee-jerk religion out there about doing that, but actually stop and think about it. What exactly are you trying to solve by using a whole plane for power? You've already got a whole plane for ground, so the desirable effects of a ground plane will be there whether you have a power plane or not. The small extra capacitance of power to ground that a PC board provides is relatively small and doesn't guarantee low impedance power except at very high frequencies. Unless this design handles RF at high 100s of MHz or more, there is little reason for a power plane. The design will probably benefit more by allowing routing signals in a third layer than any slight benefit from a power plane.

However, power still needs to be low impedance at each point of use. This is accomplished by proper bypassing as close as possible right where the power enters each chip. A 1 µF ceramic cap to ground provides low impedance up to a few 100 MHz, which is good enough for typical microcontroller designs, for example. At low frequencies, even a modest trace has so little resistance to not matter for most power uses. The copper traces take care of the low frequency impedance, and the bypass caps the high frequency impedance.

Put another way, when you have a good ground plane and use good bypassing, there is little advantage to a power plane.

To answer your questions about the USB signals, don't worry about it. As I said above, I'd want 8 mil gaps to elsewhere instead of 4 mil gaps. But, even a few 4 mil gaps won't matter as long as the traces from the USB connector to the chip that handles the D+ and D- lines is short. If the D+ and D- lines on the board are a inch or less in total length and reasonably straight, a few 4 mil gaps to ground aren't going to matter.

Placing the USB chip close to the USB connector is something that should have gotten fairly high design priority.

  • \$\begingroup\$ I don't know which answer is the best, but all helps me a lot. I added a entirely filled with copper vcc plane because I read that it is better to have a larger trace width for vcc, so if the vcc plane is filled entirely then I won't have to worry about such a limitation, but maybe I'm wrong. So I asked a question which could interest you : electronics.stackexchange.com/questions/288598/… \$\endgroup\$
    – Alphapage
    Feb 24, 2017 at 16:44

Assuming you're running data over your USB, you should have the D+ and D- tracks routed as a differential pair with a characteristic differential impedance of around 90 ohms. The spacing between the data tracks/vias and other signals (including power and ground) should be at least 0.5 mm, and the clearance between the data and any clock (or other fast-changing) signals should be at least 1.3 mm. Ideally you should minimize the number of vias in the data connections for the USB.

Here is a reference document for USB board design: http://www.usb.org/developers/docs/hs_usb_pdg_r1_0.pdf

Even if you aren't doing a high-speed design, it's good practice to follow these guidelines.


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