27 bit parallel Bus @65MHz: Use 3.3V or 1.8V?

Question

I've a LVDS transmitter (SN75LVDS83B) connected to the GPIO bank 0 (as DPI24) of a raspberry pi compute module 3. The pixeclock is 65MHz, the 27 parallel lines are 3 x 8 bit RGB + Hsync + Vsync + DE. The length of the lines is approx. 80mm.

Now I have the choice to power the GPIO bank 0 and the LVDS receiver with 1.8V or 3.3V. Both works and I ask myself what would be the better option. My pro/cons:

• 3.3V pro: Higher signal to noise ration
• 3.3V contra: Higher electromagnetic emission and energy consumtions
• 1.8V: The above inverted: lower signal to noise ration but less emissions and power consumption.

Are these assumptions correct and are there other reasons to prefer 3.3V or 1.8V (both are present so there aren't additional expenses for a second voltage)

Answer 1

As all things are equal in your description (ICs available and operate in both voltages), the 1.8 V solution will be the better choice. Your reasons listed are correct and signal rise/fall times should be better and will be no worse.

The 65 MHz signals should not be corrupted on their 80 mm trip to your PCB if you use a good, standard cabling/grounding scheme (outline more in your question and I can expand this answer).