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I want to transfer a sequence of bits (say 1110) from one end of a wire and then receive at the other end of the wire. Both ends of the wire would be having a microcontroller.

Now I want to know the effect a resistor and a capacitor will have on the bit transfer, compared to them not being present at all.

I know that a wire itself has its own resistance, but I just want to know what effect will a true resistor have.

Thanks

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  • \$\begingroup\$ What about 0 volts? \$\endgroup\$ – Andy aka Mar 1 '17 at 14:51
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I'm assuming you mean an in series resistor followed by a capacitor to ground. This will act as a low pass filter and will increase the rise/fall times of the digital signal. This will make it less noisy and help reduce reflection effects by impedance matching your input/output to the line.

Too much though and you will no longer have a decipherable digital signal.

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  • \$\begingroup\$ The resistor and capacitor both won't be present together. Once there would be a wire alone, then the second time a resistor and then only a capacitor. And yes, the components would be in series alone. \$\endgroup\$ – Samurai Mar 1 '17 at 15:09
  • \$\begingroup\$ A capacitor alone in series would simply decouple the signal making it a +/- signal. No idea why you would want to do that for a digital signal. \$\endgroup\$ – Trevor_G Mar 1 '17 at 15:22
  • \$\begingroup\$ Here is a useful article on the subject marvintest.com/KnowledgeBase/KBArticle.aspx?ID=196 \$\endgroup\$ – Trevor_G Mar 1 '17 at 15:22
  • \$\begingroup\$ I just want to know what effect a resistor or a capacitor will have on bit transfer. Need to show whether there would be a delay in the bit transfer due to the presence of the components. That's all. \$\endgroup\$ – Samurai Mar 1 '17 at 15:51
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This would be a model for your situation. R would be the wire resistance, C would be the gate capacitance on the reception side:

Switched RC circuit

These would be the input/output waveforms:

I/O waveforms

The rising/falling times increase can end up degrading the voltage levels outside of the acceptable limits of a logical 0 or 1.

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