I am designing a board that will have three MAG3110 sensors on it. In the data sheet, the "Application Circuit" shows 5 capacitors. My question is, if I have three of these sensors on one board, all pulling from the same power line, is it safe to assume that the example circuit should be replicated for each sensor, or will I be introducing unwanted effects by adding 10 capacitors between the power and ground lines?

Application Circuit Diagram

  • \$\begingroup\$ You could duplicate them all, or duplicate them all bar the 1uF job which you would replace with a central 10uF. \$\endgroup\$
    – Trevor_G
    Mar 4, 2017 at 21:04
  • 1
    \$\begingroup\$ Thank you. This is because the 1uF is intended for bulk decoupling, so simply increasing the value will provide sufficient decoupling for all of the sensors? I am an ME by trade, but I'd like to understand the reasoning behind my design decisions. \$\endgroup\$
    – kmohr
    Mar 4, 2017 at 21:23
  • \$\begingroup\$ Correctamondo ! By the way, there is only one de-coupler in there.. the 100nf beside the big one. The others play more active roles. \$\endgroup\$
    – Trevor_G
    Mar 4, 2017 at 21:36

2 Answers 2


PCB traces have parasitic inductance and resistance, that is why we place capacitors close to the load. When the a load suddenly switches, the voltage drops at the load (op amps, microprocessors, comparators, sensors, ect). When the voltage drops at the load, it can lead to noise in analog systems and errors in digital system. Most circuits are built to function at a steady voltage level.

The PCB trace inductance and resistance prevents the voltage from being regulated immediately by a power supply. Power filter caps fix these problems.

You can use one power filter capacitor for multiple chips. However, there are downsides to this.

Capacitors have ESR and ESL, which means they have parasitic effects that affect mostly the high frequency impedance of the capacitor and its ability to 'short' high frequencies (to ground).

1) The further you place a capacitor away from a chip, the longer you have to run a PCB trace to the capacitor thus increasing it's ESR and ESL. (that means you have a possibility for more noise)

2) A shared capacitor could increase noise, if one load temporarily dips the other load will also see it, I've shown this in the diagram below (I did not include capacitor parasitics)


simulate this circuit – Schematic created using CircuitLab

There have been times when I've used capacitors with multiple loads because space was more of a consideration, the loads were analog and were also mostly constant loads.


The biggest consideration in my opinion would be how far away from each other each sensor is... The decoupling capacitors serve to provide necessary transient surges to the current of the sensors while avoiding the inductive parasitic of long traces (If the sensor needs to 100mA more current in an instant and you don't have those caps close... It wont be getting it!)

If the sensors are going to be placed far away from each other I would say stick to the recommended layout... If relatively close, you can probably get away with it just fine.

Relatively close vs relatively far is a tricky thing to quantify without a decent amount of analysis of your trace parasitics etc, but I usually think better safe than sorry and decouple a ton! hah


Your Answer

By clicking “Post Your Answer”, you agree to our terms of service and acknowledge you have read our privacy policy.

Not the answer you're looking for? Browse other questions tagged or ask your own question.