I'm working with the ADC on STM32L476RG. I found that the SAR used for the ADC is 12 bit whereas the data register (ADC regular Data Register (ADCx_DR)) is 16 bit (16 bit reserved). Why is it like this? Will the higher (MSB) 4 bits always be zero?
You are able to select an alignment within those 16 bits, if you want the ADC data to be in the most or least significant bits.
If it's right aligned bits 15:12 will be 0, or the sign if it's signed data. It's documented in section 18.4.26 of the linked reference manual.