Voltage mode (PWM) control

For a buck converter, I am trying to understand how the appropriate signal is sent to the PWM block to control the duty cycle of the FET. When the output voltage is equal to your reference voltage (15V in picture), the error is 0. So does that mean the PID controller somehow outputs a signal of 0.5357 assuming a 0V to 1V sawtooth signal to compare to for the comparator to generate the PWM?

Because with a buck converter: Vout = D*Vin, so Vout/Vin = 28V/15V = 0.5357 = D.

• If the error is zero the controller neither increases nor decreases the pulse width... Rather it holds it at that pulse width till an error voltage is detected then slews the width in the right direction. Commented Mar 9, 2017 at 3:13

If the error is zero the controller neither increases nor decreases the pulse width... Rather it holds it at that pulse width till an error voltage is detected then slews the width in the right direction.

You can think of these power supplies as two parts. The actual power supply is that rather large capacitor at the output of the circuit. That is what is driving your load. Everything to the left of it is there to simply keep the capacitor filled to the right level.

If there were no load resistance the PWM would actually shut down at some point because the capacitor would reach the allowed max output voltage. That's why most switching power supplies either have a minimum load requirement or have a built in shunt resistor to keep the clock ticking under no-load conditions.

So, in a nutshell, the PWM mark to space ratio is dependent on your load.