I am looking to develop fast-fast, fast-slow, slow-fast, and slow-slow (FF, FS, SF, SS) CMOS models from a typical model for a particular mature CMOS process (say, 0.25 um minimum feature size and above).
Typically, in the past, I have been given a CMOS model with hooks in place that allow me to change the corner used for simulation on-the-fly. However, I have found myself in a situation* where I have the model file for a particular CMOS process with only typical parameters, and I'd like to, systematically, produce the corner models from the typical one. I am not adverse to manually creating the file with my hands and a text editor, and otherwise doing a bit of grunt work to make this happen. (However, I am not looking to make physical measurements to accomplish this task.)
How would one, systematically, develop corner models from a typical CMOS model? Assume for the purposes of this question that the "level" of the model is such that there are only a handful of parameters that need tweaking.
I realize that a lot of the finer details of how to do this effectively / correctly / etc. will depend on the actual fabrication technology, the types of circuits being simulated (I'm interested in simulating analog amplifiers along with the typical performance attributes that go along with that, such as gain, slew rate, phase margin, output swing, ICMR, etc.), but I'm just looking for general, good-rule-of-thumb, guidance.
In particular, if it helps to narrow the focus of this question a bit, I am looking to develop corner models from the typical model for the following SPICE CMOS model parameters: VTO, KP, GAMMA, LAMBDA, PHI, MJ, MJSW, CGBO, CGSO, CGDO, CJ, CJSW, LD, TOX
An example of what I am after:
Suppose that the VTO for a typical NMOS device in a mature CMOS technology is 0.6 V. How would I adjust VTO for the fast NMOS corner? How about the slow one?
I'd like to be able to develop fast and slow model parameter values for all of the parameters I listed above in a similar fashion as that in my VTO example above.
Comments such as "just get it from the fab!" or some such are not helpful to me and will thus be ignored. :-)
* To motivate my question a bit more:
I teach an electronics lab, and I incorporate a typical CMOS model for a mature process for an amplifier design project. I do not have the corner models for this particular process. What I want to do is tweak the typical model to develop corner ones so that my students can also see the effect of corner variations during the design cycle. I have already spent some time on my design and do not want to have to redo it with a new set of models, so I figured I'd ask for some rule-of-thumb guidance; e.g., Cgs goes up by X%, Vt down by Y%, etc.