I have a Xilinx/Digilent Spartan 3E starter board, UG230. I'm designing a PCB for an ADC/DAC board. I'm quite new to FPGAs (with some experience), but I don't want to make any silly mistakes using the Hirose FX2 connector (J3) - see board datasheet pg. 115. I have 2 questions:
1) The board clock is 50 MHz. Can I also output that same 50 MHz onto an IO pin to clock the ADC? I know this will work in theory, I just want to know if the FPGA will be able to do this? I'm used to MCUs where the IO speed can only be a fraction of the master clock.
2) Some of the pins on the Hirose FX2 connector are IO and others are INPUT only. The ADC I have is a 16 bit parallel bus, and I'd like to keep the IO pins for user input/output (display, etc). So the INPUT only pins would be good for the ADC. Are there any tricks to using the input pins (D12, C12, A15, B15, C15)? I would like to clock the ADC at 50 MHz (see Q1).
All advice greatly appreciated. Just don't want to get a board make and have to junk it for a silly mistake because I've miss-understood something trivial.