During development, you don't need to have flash at all to run your code from external RAM. The debugger will load the code there and run the CPU from that location. You only need to deal with flash when you want your code to survive a shutdown.
If you do need flash, you should be aware some flash controllers support direct code execution while others don't. With the first class, you can forego the bootloader (called boot copier in the documentation) and run the code directly from flash, which saves you RAM but is often significantly slower. With the second class, you have no choice but to use the boot copier and run your code from RAM.
A typical example of the second class is the Legacy EPCS controller. It maps a small ROM containing the boot copier into the address space, so CPU reset vector should point to it in order to get your code into RAM on reset. Notably, this controller is designed in a way enabling you to keep both the FPGA configuration and your code in the same flash device. As a result, the procedure for flashing your code is somewhat complicated.
An example of the first class is the newer EPCQ controller. Unlike EPCS, it maps the entire flash contents into the memory space, which is required for in-place execution. You can still choose to put a boot copier in it and run your code from RAM to achieve faster execution speed. The Embedded Peripherals IP User Guide explains you how to choose between the two options:
The Nios II SBT tools know whether to append a boot copier based on the .text linker section location. If the .text linker section is located in a different memory than where the reset vector points, it indicates a code copy is required. At this scenario a boot copier is required. You can use the existing logic to generate a programming file with or without a boot copier depending on the scenario.
In case you don't know, linker sections are configured in the Board Support Package configuration dialog.