We have designed a circuit which is enclosed inside a plastic enclosure. The equipment was tested on a standard ESD testing site (on top of a isolated plate placed on a HCP). The equipment failed the ESD test at -3kV shot directly to the HCP. The MCU halted operation, it did not reset, just halted operation.

I have a question:

  1. Would it help (make them more resistant) to set unused (tri-stated) MCU pins as output? (EDIT: I have a JTAG-port/connector which I suspect is the one causing the problem)
  • 2
    \$\begingroup\$ 1: Magic. There are all kinds of unobvious ways. 2: You went to ESD testing with floating pins!!? \$\endgroup\$ Apr 3, 2012 at 18:53

1 Answer 1


This is a HUGE topic, one that we cannot possibly cover completely here. But I'll give a quick overview of the basics. I'm not trying to be 100% correct here, but at least 98% correct. What I mean by that is that I'm going to gloss over some of the details but I'm still largely telling you the truth.

  1. If ESD messes up your system, and there is not a direct path from the spark to your circuit, then the energy is being transferred as a radio wave.
  2. Any antenna is as good at receiving radio waves as transmitting them. Meaning, the same things you do to keep a signal from radiating EMI is also the same things you do at preventing EMI from being received. Do this for any signal that is important, not just signals that are wiggling a lot.
  3. Pay very close attention to "loop area", and minimize it. Google it if you don't know the term. This goes for more than just PCB's. It applies to cables too.
  4. A lot of ESD issues are from connectors and cables. If you didn't address ESD issues then you can assume that you have ESD issues. You can't just build it and hope that ESD isn't an issue on connectors, you must make it a non-issue.
  5. Look for any signal that could wiggle due to ESD/EMI, and fix it. This includes unconnected pins, etc.
  6. Reset signals are a common problem place. Usually they are pulled high with a large pullup resistor, and it's easy for a spike to pull it down. Pay close attention to signal routing and use a lower-value resistor if possible.
  7. Read my answer on protecting against ESD here: ESD protection of ADC input
  8. Properly handling ESD/EMI on a 2 layer PCB is difficult, but not impossible. It's much easier to do this on a 4 layer PCB with power and ground planes/layers.

While your JTAG port could be causing issues, I suspect that if it is an issue then it's just one of many issues. I have JTAG ports on all of my boards and have never had problems with them. Of course I've designed my boards to handle ESD from the start.

3KV sparks is actually really small, and indicates that you have a serious problem. Although most regulatory stuff requires 8KV, I highly recommend testing to 15KV or even 20KV.

I can't give you more info unless I see schematics, a photo of the PCB, and possibly a pic of the PCB layout.

  • \$\begingroup\$ Thank you for your very good answer. I do have designed it to handle ESD, but obvious not good enough. It is a 4-layer design, and the only test it failed was the one mentioned. All the other passed, also direct ESD discharge. So therefore I suspect it to be some floating IO pin or something. \$\endgroup\$
    – JakobJ
    Apr 3, 2012 at 19:50

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