# Feedback in combinational digital circuits

It is recommended that one should not use feedback in a combinational circuit and the reason is pretty clear because, the delay of the output that feeds to the input causes malfunction.

However, the ACT-1 cell from ACTEL (see Fig. 2 from datasheet) is a basic cell consists of some multiplexers (which is combinational) which is capable to implement even flip-flops! See this example which uses feedback to implement an RS latch. So, the question is, should we use feedback or not?

• Use feedback when you know what you're doing and want the effects that you will get. Otherwise, don't. – WhatRoughBeast Mar 16 '17 at 14:57
• When you use feedback, you no longer have a combinatorial circuit. Designing such a circuit is much more difficult than the class layer-of-combinatorics alternated with layer-of-storage. But it might have advantages, if you know very well what you are doing. – Wouter van Ooijen Mar 16 '17 at 15:02

As mentioned, combinatoric logic with feedback is used to implement flip flops and latches, so it isn't intrinsically bad.

However, there are some specific problems when using it, especially in an FPGA (where you are presumably eventually going to drive flip flips). The first problem is that the settling time of a circuit with feedback is not statically determinable. In the absence of feedback, the synthesis tool can simply sum the propagation delays of all the gates to determine if the outputs will settle by the next clock cycle, and thus determine the maximum operating frequency of a circuit. If there is feedback, that is not possible.

Second, the type of feedback you are describing normally generates latches, not flip-flops. This presents a few problems. A latch can 'see' temporary / intermediate states and respond to them in a way that you don't expect. For instance, if you have a counter that goes through the states 00, 01, 10, 11, and you want a latch to fire when you see the state 11. During the transition between 01 and 10 you may go through the state 11. Then, if you recompile the supply voltage changes, or the chip temperature changes the behavior can shift so instead you go through an intermediate state. This instance could be fixed by using Gray codes, but that won't always be possible.

Any flip-flop is built around combinational logic with feedback. And nobody can stop you from building a completely asynchronous (and functional!) design.

However, those designs are really complicated and certainly not for beginners. For most designs, synchronous logic is preferred since many design and debug tools (like Static Timing Analysis) can be used only on the environment of a synchronous design.

So the answer to your question is (as already said in same comments), unless you know very well what you are doing, do not use feedback on combinatorial logic.

Judging from your tags, you're suggesting to use VHDL and an FPGA to design combinatorial memory elements. However, although you can simply design gates and multiplexers in VHDL, their logical function will actually be implemented into lookup tables (LUTs) on the FPGA. The timing behavior will differ depending on how the functions are mapped onto these LUTs: what inputs are used, how many inputs are used, etc.

In addition to this, the size of the LUTs is limited (usually to 4-6 inputs), so for more complex functions multiple LUTs need to be connected together. The connections between the LUTs (routing elements) each introduce another timing elements that all are very dependent on the final implementation in the FPGA.

You can configure your design's timing using design constraints: this tells the synthesis, place and routing tool what timing you want to achieve on your signals. It is used a lot in complex high-performance applications. However, it is very labor-intensive and quite difficult: the tool will not see the bigger picture for you, so you have to know what you are doing. It also likely increase run-times of the synthesis, place and routing, as these tool will have to put a lot of effort into achieving your goals.