What is the role of marked area? Where is the address going? Also shouldn't there be an arrow from instruction decoder leading somewhere?

I know basics of comp arch and know am aware of program counter and addresses but can't understand this particular diagram. The desc. from the book is:

Data items are placed in the register file—a storage bank made up of 32-bit registers. Since the ARM core is a 32-bit processor, most instructions treat the registers as holding signed or unsigned 32-bit values. The sign extend hardware converts signed 8-bit and 16-bit numbers to 32-bit values as they are read from memory and placed in a register. ARM instructions typically have two source registers, Rn and Rm, and a single result or destination register, Rd. Source operands are read from the register file using the internal buses A and B, respectively. The ALU (arithmetic logic unit) or MAC (multiply-accumulate unit) takes the register values Rn and Rm from the A and B buses and computes a result. Data processing instructions write the result in Rd directly to the register file. Load and store instructions use the ALU to generate an address to be held in the address register and broadcast on the Address bus. One important feature of the ARM is that register Rm alternatively can be preprocessed in the barrel shifter before it enters the ALU. Together the barrel shifter and ALU can calculate a wide range of expressions and addresses. After passing through the functional units, the result in Rd is written back to the register file using the Result bus. For load and store instructions the incrementer updates the address register before the core reads or writes the next register value from or to the next sequential memory location. The processor continues executing instructions until an exception or interrupt changes the normal execution flow.

Von neumann arch of ARM


closed as unclear what you're asking by Marcus Müller, Autistic, ThreePhaseEel, Dmitry Grigoryev, Voltage Spike Mar 20 '17 at 16:20

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  • \$\begingroup\$ Come on, we need context. Where is this from? what does it describe? What do you know about computer architectures? Do you understand what Addresses are used for in computers? Are you aware that some ARM cores are (modified) von Neumann, while others are Harvard architectures, and this might have a very significant impact on the interpretation of this block diagram? \$\endgroup\$ – Marcus Müller Mar 18 '17 at 16:29
  • \$\begingroup\$ i have updated the question for context \$\endgroup\$ – Chirag Gupta Mar 18 '17 at 16:35
  • \$\begingroup\$ Thanks! Much, much better! Still wish you said exactly what book you're referring to \$\endgroup\$ – Marcus Müller Mar 18 '17 at 16:36
  • \$\begingroup\$ @Marcus - Agreed. In case it helps, the book quoted by the OP seems to be "ARM System Developer's Guide: Designing and Optimizing System Software" by Andrew Sloss, Dominic Symes, Chris Wright. Here is a Google Books link to the relevant page (20) which currently works, but I don't know if these links suffer from "link rot" in the long term, and of course some pages are not viewable. \$\endgroup\$ – SamGibson Mar 18 '17 at 16:56
  • \$\begingroup\$ perhaps it is implying that you can take r15 (pc) directly as the address OR a computed address if this is a branch. \$\endgroup\$ – old_timer Mar 18 '17 at 17:09

What is the role of marked area? Where is the address going?

The program counter is actually R15 in the set of general registers. Therefore, whenever an instruction needs to be fetched, the contents of this register are sent to the memory address bus.

Also shouldn't there be an arrow from instruction decoder leading somewhere?

It's implicit that the instruction decoder connects to the control inputs of all of the other blocks in the diagram. This particular diagram is showing only data paths, not control connections.


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