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I have an old design, since 1999 approximately, with an old FPGA XCS30XL and old MCU6840 MCU. They are connected together via a parallel bus peripheral and both utilise and power off 5V. But there is an oddity which is that some of the control lines between the two (IRQs, CSs, R,W,etc) are pulled to 3.3V instead of 5V (Address/data are a mix pulled to 5V or no pullups). All other pullups in the system are generally 5V,

What could the reason/benefits be for pulling a 5V signaling system (at 16Mhz or so) to 3.3V instead of 5V in push/pull logic when the chips actually use 5V signaling?

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XL is 3.3 V-supply version of the chip, and it may be wise to pull its outputs up to this power rail rather than to 5 V one. Datasheet explicitly says that 3.3 V outputs can drive 5 V TTL inputs without problems.

However it may require special consideration in order not to create bridges of excessive current between outputs and inputs of devices connected to different power supplies. Check this one.

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  • \$\begingroup\$ You are absolutely right! Hidden pins in the schematic masked that it was actually 3.3V device which explains alot. Thank you ! \$\endgroup\$ – Stonie Mar 21 '17 at 14:22

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