From David's comment to this answer I understand that it's an undesirable effect in high speed designs. Can someone explain in detail?


The quick answer is where ground inside of a chip goes up and down relative to the ground on the PCB. This is due mostly to the lead inductance of the pins combined with high-speed changes in current on the ground pins. The more current on the ground pins, and the more that current changes, the more ground bounce there will be.

A related issue is called Simultaneous Switching Noise, or SSN. Essentially this happens when a lot of outputs on a chip change at the same time, and in the same direction. This causes a huge increase in current on either the power or ground pins, and usually is shown as noise in those output signals. This is a common problem on systems with wide parallel address or data busses-- for example, when a CPU writes to memory and the data lines change from all zeros to all ones.

Normally, ground bounce is not an issue but SSN is a huge issue for wide, parallel busses. (As an aside, this is a good reason for PCIe over PCI, or SATA over the old ATA interfaces.) When ground bounce is an issue, it usually first appears as increased EMI or noise on chip outputs. When it gets worse, the chip can stop functioning correctly.


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