Inspired by this question's accepted answer, I've been studying how PCB trace impedance can be affected by the trace's surroundings. However, something in the accepted answer is confusing me:
Having copper pour all over the place close to my signals!!! That would cause impedance discontinuities everywhere.
Why does this cause impedance discontinuities?
As I understand it, copper pour near a trace on the same layer causes an impedance discontinuity because it offers an capacitively coupled path as it runs adjacent to a signal trace. The coupling changes the capacitance for adjacent regions of the signal trace but not the remaining portion. This coupling occurs even if the copper pour is electrically isolated (for reasons I don't understand, but that is a separate question).
Is the above paragraph accurate? If so, are there other reasons for the impedance discontinuity?