I designed a bipolar audio amplifier to drive a small 0.5W 8 ohm speaker. I am going to use it to listen to other circuits I make. First time doing this since college. Here's the schematic:enter image description here.

It's a CE followed by 2 CC stages. I don't have power resistors or bjts, which is why I have 2 transistors and 4 resistors in the second CC stage.

I put 2 CC stages because I needed a lot of bias current for the output transistors, meaning R8-14 are small, but the CE input stage didn't like driving a low impedance so I put another stage in between.

The simulation works pretty well and drives the 8 ohms with ~250 mW.

My questions are: 1.) Does it make any sense to match the DC level between stages if the stages are AC coupled?

2.) What is the minimum limit for collector current? Is it just when the internal pn junctions stop being fully on?

Any other comments on the circuit are appreciated. I apologize if I didn't do enough searching before asking.

I checked the meta and it said design review questions are okay as long as they're kind of constrained.


  • \$\begingroup\$ Those emitter follower output BJTs, pulled down with 75Ω are terrible! Sure, the BJTs can pull up just fine. But the only thing you have pulling down is a crappy 75Ω impedance. This is not done in practice. \$\endgroup\$ – jonk Apr 3 '17 at 0:48

1.) Does it make any sense to match the DC level between stages if the stages are AC coupled?

No. Each stage should be individually biased to get the maximum output voltage swing with minimum distortion. If you are coupling stages with electrolytic capacitors then a having a voltage difference helps to keep the capacitors biased (just make sure to install them with the correct polarity!).

2.) What is the minimum limit for collector current? Is it just when the internal pn junctions stop being fully on?

In a linear amplifier the junctions should never be 'fully on'. The minimum Collector current limit is 0, but since an audio wave is AC you want the quiescent current to at least equal the peak positive and negative output currents.

During positive peaks the output current is only limited by Base current x current gain, but during negative peaks it is limited by the pull-down resistor(s). If the signal is too strong then Collector current will drop to zero during negative peaks. This will flatten the bottom of the waveform and cause even-harmonic distortion. However you don't have to worry about crossover distortion, so the linearity at low volume should be excellent.

At best a class A amp is 50% efficient at maximum sine wave output, but with a resistor pull-down it is even worse. This is OK if you don't mind having a lot of heat for not much output power. For safety and reliability I would put heatsinks on the output transistors.


I would say it doesn't make sense to match the DC voltages because you will not know that the capacitors are in the circuits correctly given tolerances and assuming they are polarized.

You can pick any bias current you want. If you look at the DC hfe graph in the data sheet, you'll see that you are losing gain as you go up or down from 10mA. I would not go much below 100uA.

Other comments are you can get equivalent performance with many fewer parts. All the gain is in Q1. Two emitter followers could be DC coupled from Q1's collector. This would save two large capacitors and four resistors. If you do it this way, you will have about 7V at the output which can be capacitor coupled to the speaker.

Putting two common emitter stages may work well in simulation. In reality, these are not matched and one of the followers is going to do almost all the work.

If you use a PNP for the second stage and look into feedback pairs, you find you can get better control over the gain, higher input impedance, and lower output impedance with a similar number of components. Search series-shunt feedback pairs.

  • \$\begingroup\$ By feedback pairs, are you referring to Sziklai pairs? Also, thanks for the great answer; I wish I could pick 2. \$\endgroup\$ – DavidG25 Apr 3 '17 at 18:51

single-ended followers aren't terribly efficient, or in this case effective - uneven slew rates aren't good.

you may want to look into an amplifier with push-pull stage, or jlh1969 for class a or jlh1969 for class a/b operations.

alternatively, 0.5w is absolutely doable for cfb opamps - ad815 or tpa6120 (or its ths counterpart). you can find lots of such amps in xdsl modems.

  • \$\begingroup\$ Power's not a concern, since I'll be running from a wall supply. Also, I am avoiding using an IC for the learning experience. \$\endgroup\$ – DavidG25 Apr 2 '17 at 22:35

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