I saw the following question online

The question

I knew that while Vbe was less than 0.6v, there would be no current and the collector voltage would be Vcc. At 0.6V, I knew that the transistor would turn on, and there would be a voltage drop across the resistor, but I did not know how much. After 0.6v, I did not know

Here is the answer, but I cannot explain it- Why does he say that it goes into saturation? Why does the voltage go up?

The Answer

  • \$\begingroup\$ That "saturated" line is just badly drawn; it actually goes down by a little bit. Do you know the difference between the linear and saturation regions of a transistor? \$\endgroup\$ – CL. Apr 3 '17 at 7:44

The saturated region is more complicated than shown in that diagram. CL's comment says that it 'actually goes down by a little bit', which is true for low base voltages, but then at higher base voltage it does go up again.

The initial drop of 'saturation' voltage is where it goes from 'soft' saturation to 'hard' saturation. There is no well-defined distinction between these two, it's simply the ratio of collector to base current. As the ratio falls below hFE, the saturation becomes 'harder', and the saturation voltage falls a little more.

As the diagram has been drawn with straight lines, we can assume the exercise is asking you to ignore this feature of the transistor, and treat saturation as if it happens at a unique base voltage, rather than be smeared out a little as discussed above.

As the base voltage increases further, the base current increases further. The base-emitter diode is now turned on fully, and the residual resistance of the emitter is limiting the base-emitter current. Current through the emitter resistance lifts the emitter voltage, and with it the collector voltage, as shown approximately in the graph.

I must say I find it a bit odd to show a rising straight line. The simplest 'ideal' model is a flat straight line. If we are going to include further accuracy, then I think it would be appropriate to include both the dip and the rise. However, the graph in the exercise has shown only the rise, and that's the question you're being asked to answer. I suppose the model can be extended by the addition of a simple linear emitter resistor to explain this effect. However, the fall before it has more complicated physics. I am assuming this question was asked following a presentation on transistor models.

  • \$\begingroup\$ "Current through the emitter resistance lifts the emitter voltage, and with it the collector voltage, as shown approximately in the graph."- The emitter is connected to ground. Only Vc can change here. Vcc-Ic*Rc=Vc. I understand that Ic is dependant on Vbe. I suppose I also wanted to know why the transistor goes right into saturation after 0.6v \$\endgroup\$ – David Apr 3 '17 at 10:05
  • \$\begingroup\$ Here is where I found the question- It was not after such a presentation- lumerink.com/courses/ece697/docs/… \$\endgroup\$ – David Apr 3 '17 at 10:07
  • \$\begingroup\$ The emitter terminal of the packaged transistor is connected to ground. However, the internal emitter junction still has some doped silicon and a bond wire to go through before it gets to the terminal. These comprise the 'residual resistance' of the emitter. \$\endgroup\$ – Neil_UK Apr 3 '17 at 10:09
  • \$\begingroup\$ But why does it go into saturation? \$\endgroup\$ – David Apr 3 '17 at 10:22
  • \$\begingroup\$ It goes into stauration when the collector terminal can sink more current than the collector load reisstor can provide, ie when base_current *hFE exceeds max collector load current. \$\endgroup\$ – Neil_UK Apr 3 '17 at 12:43

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