I'm intrested in doing somethings with FPGA's, but most sources lead to a hardware description language. I'm personally more interested in using something like http://www.simulator.io. Where you just plan your gates out thus being able to see what the gates look like. Is there anything like that which can be used in an FPGA board.

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    \$\begingroup\$ As far as I know, major tools like Quartus (Altera) and Xilinx ISE allow schematic entry in the way you describe. \$\endgroup\$ Commented Apr 5, 2017 at 5:38
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    \$\begingroup\$ If you really want to use an FPGA, you'll need to learn a HDL. Everything else can not handle the complexity even of simple FPGAs. All tools can visualize the HDL as schematics even down to the gate level. But schematic input is limited. \$\endgroup\$
    – Paebbels
    Commented Apr 5, 2017 at 6:20

1 Answer 1


Usually the functionality of what goes on an FPGA is so complicated that a schematic representation is extremely cumbersome. And usually when working with FPGAs, one works much higher than at the level of logic gates. The synthesis software then takes over the job of converting a relatively easy to read and maintain behavioral description into FPGA specific components. Note that I don't say 'gates' here because FPGAs are generally built from reconfigurable logic elements which can stand in for rather complex logic functions which would otherwise a number of gates to implement.

Another problem is that there are no standard methods for saving graphical schematics for FPGA use. Vendors sometimes have proprietary tools for this. And the tools, when they exist, are usually quite cumbersome. Not much development time is spent on them because most people who do serious FPGA work use only HDL.


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