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I have a x100 opamp amplifier, which seems to work:

schematic

simulate this circuit – Schematic created using CircuitLab

Datasheet for the opamp: here. The diodes are there to protect the inputs of the (expensive) opamp. The opamp is powered from +-250V rails, with 1nF and 100nF decoupling caps right by the pins, and have less noise than I can measure with my scope and probes (<10mVptp).

I built and tested the circuit. It works, but I would like to reduce the noise present at the output. Since the DAC is relatively noisy at about 10kHz and harmonics, I thought I could reduce the bandwidth of the amplifier. I tried adding 15nF in parallel with R3, on the expectation that this would reduce the gain high frequency. Simulating in LTSpice with a generic opamp suggested it should work. But it started oscillating at about 1-2MHz, rail to rail.

I have realised I don't really understand the criteria for an amplifier to oscillate. Why is my amplifier oscillating? And how should I reduce the bandwidth without oscillation?

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  • \$\begingroup\$ The criteria for an amp to oscillate is simple: if it has a phase shift of 180 degrees and a gain > 1.0 at some frequency, you just built an oscillator. Presumably, at 1 MHz the phase shift is a combination of your feedback capacitors plus the limited slew rate of the amp, and went through 180 degrees while there was still a bit of gain available. \$\endgroup\$
    – alephzero
    Apr 5, 2017 at 12:15
  • \$\begingroup\$ Spec says this 1kV rail to rail Op Amp is marginally stable at Av=100 and unstable at Av=10 and demands your understanding of Bode Plot phase margin with external compensation, good layout and no capacitive loads at low gain unless compensated. The delay in feedback at 1MHz is due to some internal gain boost where the negative feedback turns into positive feedback and low gain meaning high feedback ratio. Ask Mfg Tech support for Phase Margin plots and Design tips on stability or read 1975 National Semiconductor Op Amp handbooks on same for "external compensation" or Wiki... \$\endgroup\$
    – Tony Stewart EE75
    Apr 5, 2017 at 12:24
  • \$\begingroup\$ Step response % overshoot is a clear indication of gain margin towards oscillation. This is basic theory. Cap MUST be NPO ceramic type ( low ESR) and have good track layout and gnd, not any old breadboard at low gain. This special CMOS Op AMP requires more skill to use. \$\endgroup\$
    – Tony Stewart EE75
    Apr 5, 2017 at 12:30

2 Answers 2

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Your amp seems to have pins for a deliberate compensation cap. They added those for a reason, implying that the usual capacitor from the output directly to the negative input might not work so well. Looks like you confirmed that. If you want the amp to be more stable, increase C1.

To reduce out of band noise, try adding a little low pass filtering of the input signal. For example, you could split R1 into two halves and put a capacitor to ground from the middle point.

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  • \$\begingroup\$ This. If possible filtering the noise upstream is best, and as Andy says filter out the virtual ground too. You are using a 150$ opamp with the cheapest voltage reference money could buy... A 2V5 stable reference is just a no brainer in this design. \$\endgroup\$
    – Vladimir Cravero
    Apr 5, 2017 at 12:08
  • \$\begingroup\$ @Olin I don't really know how the compensation cap aids stability, I'll do some reading. What value would you suggest trying to increase it to? I don't have many low-value high-voltage caps to experiment with, so will buy some. I'll try filtering separately before the amp too. \$\endgroup\$
    – Jack B
    Apr 5, 2017 at 12:54
  • \$\begingroup\$ @VladimirCravero The 2.5V virtual ground is actually divided down from a 5V precision reference not the low voltage power supply. The 5V ref is shared with the DACs, which should minimise zero point drift with time and temperature. \$\endgroup\$
    – Jack B
    Apr 5, 2017 at 12:56
  • \$\begingroup\$ @Jack: Compensation caps slow down the amp response, which increases stability because the amp is then slower than the system around it. Try doubling the recommended value and see what happens. It's also important to keep the leads short. This cap should be physically close to the part, right across the pins as much as possible. \$\endgroup\$
    – Olin Lathrop
    Apr 5, 2017 at 13:10
  • \$\begingroup\$ @JackB Assuming your precision reference has zero output impedance, from the virtual ground node you see 1k, with 1nF parasitic cap (that's big) you still get the pole at about 160kHz. Ideally, you do not want any frequency on that node apart DC so yeah... Just throw the cap there. Be careful: depending on the current capabilities of your reference, you will need to wait some startup time! Given the voltages you see here, be extremely careful. \$\endgroup\$
    – Vladimir Cravero
    Apr 5, 2017 at 13:34
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If the DAC is a bit noisy then it's also likely that the 5 volt supply is a bit noisy and this means that the junction of R4 and R5 is also a bit noisy. Normally, engineers would put a 1 uF to 0 volts at that point so this is something fairly easy to try.

If noise is still a problem then filter the DAC output before feeding into resistor R1. If you look at the data sheet for the device you can see that with a 4.7 pF compensation capacitor, the amplifier will just about be stable without adding the feedback capacitor. Adding the feedback capacitor certainly does look like the op-amp will become unstable between 2 MHz and 3 MHz (see phase response graph).

You haven't shown power rail decouplers on your circuit - the PA95 data sheet says: -

0.01µF or greater ceramic power supply bypassing required

Have you done this? How much noise do you have on power rails?

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  • \$\begingroup\$ The DAC is noisy as it's a 16 bit DAC interpolated to 18 bits (AD5680). The 5V line actually from a precision reference not the logic power supply, but I might try adding that 1uF anyway. I've updated the question to address power rails - they are decoupled. I don't fully understand how the phase response interacts with the feedback capacitor, but will do some reading around. \$\endgroup\$
    – Jack B
    Apr 5, 2017 at 12:52

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