I am interested in BJT transistor leakage dependency on Vce.
Specifically: parameter ICES (Collector-Emitter Cutoff Leakage, that is, collector/emitter leakage with base shorted to emitter) is generally specified at some large Vce DC bias (e.g. 50V), and I am wondering whether there is an accepted way to extrapolate the specification limits to a lower bias?
Can anyone point me to a published discussion of ICES dependency on Vce? Or BJT performance in the cutoff region in general?
Most references I have seen tend to ignore cutoff leakage characteristics and focus on forward-active and saturation.