Does anybody know if usb super speed enumeration needs the low speed D+/D- lines? I know in HS it first negotiates over low speed then chirps to get to HS mode. However I saw an intel design where they only used the SS lines to connect to a device. Reading the USB spec and then googling up some docs on USB 3.0 enumeration didn't really make it clear.


No, USB SS enumeration does not require D+/D- wires, technically.

The priority of connect process in USB 3.0/3.1 framework is as follows:

  1. USB plug is connected; SS Tx and Rx pairs are connected to HOST, D+ D- are connected as well, but initially do nothing.

  2. The SS host Tx (transmitter) periodically sends short common-mode pulses of positive polarity, and watches for line response. If the line is connected and therefore terminated with 2x45 Ohms, the RC of this is different from open line. The transmitter identifies this, and proceeds to Polling.LFPS signaling. See section 6.11 of USB 3.0/3.1 specs. The process is called "Rx Detect".

  3. The attached device tries to do the same with its Tx, but only upon seeing VBUS. If termination is detected, it starts its own Polling.LFPS signaling. These two processes are independent and asynchronous, see section 6.9.2

  4. Whoever side starts LFPS first, it waits for the link partner to start its own LFPS. When the first partner detects valid LFPS bursts, it ends LFPS and moves to link training sequencing. The partner follows.

  5. If one partner does not see the polling from other side in 360 ms, it moves into "compliance pattern". (actually, only device side does this automatically, the host needs to be specially enabled for this).

  6. If the LFPS handshake was successful, both partners proceed into link training, sending TSQ, then TS1 and then TS2 "ordered sets", and then the link moves into active "U0" state, exchanging "link management" packets and determining link capabilities.

  7. Only then the protocol layer kicks in and SS enumeration starts.

  8. Only if both link partners failed to detect Rx termination, the SS device proceeds with USB 2.0 connection pulling up D+ line with 1.5k resistor. Then the link proceeds with USB 2.0 protocol.

The entire process has quite a few quirks, and is complicated. Similar SS process occurs when the link exits from low-power modes U1, U2, and U3, with a bit different timing for the handshake.

Therefore, technically, the presence of D+ and D- is unnecessary for the USB to operate in SS mode.


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