I've tried adding capacitor across R3, capacitor from U3 output to its non-inverting input and a series resistor between U4 and U3. I've tried experimenting with some values, but dont seem to get it right.
The phase margin is -57° and gain margin +43dB. Both values indicate instability as does transient analysis.
So, how do I know what to do to stabilize the control loop? I need to insert a pole somewhere below 2.5MHz to decrease ROC to 20dB? But then again there is a problem with gain margin.
I've also uploaded the LTspice files for anyone to try the simulation, they can be found here.