Which files are required to copy / version my Quartus project?

Question

I created a 4-bit CPU in latest version of Quartus. Now I wonder which files are necessary if I want to put the files in source control? I understand that bdf, sof and qpf files should be versioned. Do I need to version the qsf, qwf and/or the files in /db ? The repository is github.com/montao/opencpu

$ tree
.
├── alu1bit.bdf
├── alu1bit.sof
├── alu4bit.bdf
├── alu4bit.sof
├── db
│   ├── system.db_info
│   └── system.sld_design_entry.sci
├── decoder2to4.bdf
├── decoder2to4.sof
├── fulladder.bdf
├── fulladder.sof
├── light.bdf
├── light.sof
├── mux4to1.bdf
├── mux4to1.sof
├── README.md
├── system.bdf
├── system.qpf
├── system.qsf
├── system.qws
└── system.sof

1 directory, 20 files

Answer 1

I can't answer specifically about github. But I can answer on what you should archive from a Quartus II project, be it into a version control repository, ZIP file or whatever...

You need to archive all of the following that you have:

qpf Quartus Project File qsf Quartus Settings File bdf/bsf/vhd/v design source files sdc Timequest constraints file sof/pof programming files (whichever one you use)

The list gets bigger if you've used Qsys. You haven't, and many projects don't ever, so I'll leave that to one side here.

You could archive the report files, some do...but I wouldn't. They run megabytes, or tens of, and can be regenerated. From the same Quartus/SP version and the same source files and input files above, you will get the same synthesis run and and configuration files produced along the same reports.

Don't archive any of the subdirectories such as 'db' - they're working directories, created during synthesis. The only exception is an 'output_files' or suchlike directory containing pofs/sofs, if you've selected the qsf/GUImenu option to store these in a subdirectory which you haven't here.

Answer 2

I was looking for the same answer though found a full list of files if you use Qsys and IP cores. Here the link goes, the post is at the path Altera Forums > Device and Tools Related > Quartus II and EDA Tools Discussion > Version control for the Quartus project.

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Minimum set of files

.qpf
.qsf
.qsys     ( Helps to regenerate your QSYS design. )
.sopcinfo ( required by software team )
.sof

Verilog files designed by you
      ( Files generated by QSYS don't seem to be required there on repository
        as they will be generated each time you regenerate your Qsys system.
        So you may not wish to upload synthesis folder on repository. )

Verilog files generated by Megawizard plug in manager.
      ( As it will contain information about customization of particular
        mega function. )

.pin file ( Contains information about all pins in your design. Although it can
        be eliminated, it may be useful. )
.sdc file which you have prepared.( SDC files auto generated by Quartus may be ignored. )

.qip file generated by Qsys
      ( available in synthesis folder once you generate QSYS design.
        only .qip, not all Verilog and other files. )
      ( without those .qip you have to open a qsys file then
        the project can auto load qsys IP into the project. )

IP Tips

You can avoid these IPs almost entirely by using
i) Inference (so you can write behavioural, mostly portable VHDL code)
    http://www.altera.co.uk/literature/hb/qts/qts_qii51007.pdf
ii) using the altera_mf library yourself (instantiate the megawizard IPs
    without using the megawizard). For example, the alsyncram megafunction
    can be found in quartus help.
    http://quartushelp.altera.com/13.0/mergedProjects/hdl/mega/mega_file_altsynch_ram.htm .
    The parameter list are the generics to the component.

Minimum set for IP:
    .v wrapper and megawizard .v
    .qip, .sip