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When reading this article, I couldn't understand the reason why CMRR is much higher in 3 op-amp topology:

Here is the difference amplifier: enter image description here

And below is the in-amp with 3 op-amps where the difference amplifier inputs are buffers and the texts says this topology has higher CMRR: enter image description here

In both above the resistor mismatch of the difference amplifier sections can be the same. What increases the CMRR in the second one. Can it be explained in simple terms?

In other words, how do the buffers which are added to the difference amplifier inputs have effects on the CMRR?

edit: According to this, the common mode voltage of A1 and A2 is buffered to A3, but what makes it reduced more? It is only subtracted at A3 as in differential amplifier. I dont get this. What increases the CMRR in the 3 amp model?

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  • \$\begingroup\$ I'm not certain enough to make it an actual answer, but I would assume that the buffers will remove a lot of the common mode already - but that's just a gut feeling. \$\endgroup\$ – Joren Vaes Apr 10 '17 at 11:12
  • \$\begingroup\$ The outputs of A1 and A2 are out of phase and A3 acts as a difference amplifier for common mode signals. Assuming A1 and A2 have tightly coupled perfgormance ( \$\endgroup\$ – Peter Smith Apr 10 '17 at 11:25
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The outputs of A1 and A2 are out of phase for signals but in phase for common mode errors and the gain of both is the same (often by laser trimming the internal feedback resistors).

A3 therefore acts as a subtraction amplifier for common mode signals; i.e. the outputs of A1 and A2 will be the same for any given common mode input assuming tight matching and therefore A3 will reject this by its own common mode rejection.

Assuming A1 and A2 have tightly coupled performance (on the same silicon they will) then the common mode error will be greatly reduced.

Here is an example:

Assume that all 3 amplifiers have a CMRR of 40dB and all amplifiers are unity gain (for simplicity) and the resistor match is perfect.

Then if the common mode input voltage is 1V (for example), then the output of A1 and A2 (for common mode) is 10mV yielding a 10mV common mode input to A3.

This is then subject to the 40dB CMRR of A3, yielding an output of 100uV of common mode signal.

The overall CMRR is, therefore \$ \frac {V_{in(CMRR)}} {V_{out(CMRR)}} \$ = \$ \frac {1V} {100 uV} \$ = 10,000 = 80dB

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    \$\begingroup\$ How is common-mode voltage gain of the buffer stage unity? \$\endgroup\$ – floppy380 Apr 10 '17 at 12:00
  • \$\begingroup\$ A1 and A2 do not reject common mode, they buffer common mode voltage. Only A3 rejects it. Please review your answer and see this: youtube.com/watch?v=VSf31DaXWUE \$\endgroup\$ – floppy380 Apr 10 '17 at 22:41

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