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Which critical processor information is stored when a program is interrupted by a hardware interrupt source ? Where does the CPU keep the information ?

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  • \$\begingroup\$ Typically only the PC (program counter) needs to be saved since you have to jump to the ISR address. It's then up to the program code at that address to save state (typically on the stack) \$\endgroup\$ – Jack Creasey Apr 10 '17 at 16:23
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    \$\begingroup\$ Welcome to the site. Unfortunately for you, this is not a free design house, homework-writing service or an on-line technical encyclopedia, copied out to you on demand. People will help you take the next step if your questions shows that you've done as much as you possibly could on your own - which your post doesn't, I'm afraid. Please either revise your question showing your work and findings so far or delete it if you find Internet searches give you your answer anyway. Again, welcome. \$\endgroup\$ – TonyM Apr 10 '17 at 16:23
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    \$\begingroup\$ @Cem Ignore the brutal moderation of the site, these guys can't remember a time when they knew almost nothing. \$\endgroup\$ – Jack Creasey Apr 10 '17 at 16:40
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    \$\begingroup\$ I sympathise completely @JackCreasey with your attitude and applaud it, it's what this site needs :-) But when the question is so basic and high-level, you know that the OP could have got far more from an interweb search and reading some of the tomes of existing text. It's phoning the helpdesk to ask which way the mains plug goes in, with the greatest respect to the OP. \$\endgroup\$ – TonyM Apr 10 '17 at 17:12
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    \$\begingroup\$ @TonyM :) I agree with both your and Jacks' comments, but I also find it rather ironic that a question about stack exchange gets put on hold on stack exchange. It is in the wrong forum though I guess. \$\endgroup\$ – Trevor_G Apr 10 '17 at 17:43
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What gets stored is the current core "State" of the processor. What actually gets stored depends a bit on the processor.

Typically, however as a minimum the current program counter, (the address of the next instruction to be executed after the interrupt is processed), and any and all core registers like the accumulators and flags such as carry, zero etc. They are stored in memory on something called a stack.

The stack is a section of memory that is a last in first out buffer. A pointer, unimaginatively called, the "stack pointer" is used to keep track of the current "end" of the used buffer.

The items mentioned above are "stacked" in a predefined order. As interrupts or subroutines are called the stack is appended with these states and the pointer moved forward.

As returns happen the last state is read back from the end of the stack and the "stack pointer" adjusted back appropriately.

Not all processors handle everything automatically though. Some, like the PIC, require you to stack and return everything except the program counter in code, and in the right order. You really need to check the documentation for the specific device you are using.

Stacks always have a maximum size allocated to them. If you branch out too many times the stack will overflow.

Which is what this forum website is named after.

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  • \$\begingroup\$ A stack is last in, first out rather than last in, last out. If you have a pile of stuff, the last thing you added will be on top, and has to be the first thing you take off the pile. \$\endgroup\$ – Peter Bennett Apr 10 '17 at 17:15
  • \$\begingroup\$ Actually very few processors store 'State' on the stack, usually just the PC. In the vast majority of processors a simple 'Ret' instruction is all that is needed to return and ignore that interrupt. For example the RET and RETI instructions in ATMega328 are very typical ...see 11.5 in atmel.com/Images/… \$\endgroup\$ – Jack Creasey Apr 10 '17 at 19:17
  • \$\begingroup\$ @JackCreasey yes indeed. You really have to check the processor specs. \$\endgroup\$ – Trevor_G Apr 11 '17 at 1:41

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