# Common drain JFET output resistance "problem"

The output resistance of small signal model for common drain JFET amplifier equals $$\frac{1}{g_\text{m}} || R_{\text{ds(on)}} \parallel R_\text{S}$$ and since $$R_{\text{ds(on)}} =\frac{1}{g_\text{m}}$$ we can also write this formula as $\frac{1}{g_m} \parallel \frac{1}{g_m} \parallel R_\text{S}$ right?

Which could be derived to $$R_{\text{OUT}} = \frac{1}{g_\text{m}}/2 \parallel R_\text{S}$$ right?

• That equation is wrong. Why do you that that is true Apr 10 '17 at 18:34
• Your title says common drain and the equations somewhat relate to that, but your schematic obviously shows common source. Well, which is it? Apr 10 '17 at 19:03
• @KevinWhite: Which equation is wrong? Correct me please.
– Keno
Apr 10 '17 at 19:57
• @SpehroPefhany: Sorry for that. I just edited the post.
– Keno
Apr 10 '17 at 20:00
• The output resistance of a common drain JFET amplfier is Ro = Rs || (1/gm). Apr 10 '17 at 20:17

$g_m$ is a transistor transconductance. In saturation region we viewing the transistor (FET) as a voltage controlled current source.
Vin is a input voltage and the output is a current, hence $g_m=\frac{Io}{V_{in}}$

Hence, for the FET $g_m$ is equal to $gm = \frac{dI_d}{dV_{gs}}$ (slope of the Id = f(Vgs) function)

In saturation region the Drain terminal behaviour just like an current source controlled via $V_{gs}$ voltage. And this is why you see the voltage controlled $(V_{gs})$ current source $I_d = g_mV_{gs}$ in the small signal equivalent circuit. Look at the answer given by KingDuken.

But this "drain" current source is not ideal. For the ideal current source the output current (drain current $I_D$) does not depend upon the voltage across it ($V_{ds}$). But in the real transistor $V_{ds}$ voltage due to channel length modulation will have small effect on the drain current.

And to "model" this effect (to represent channel length modulation on the small-signal equivalent circuit), we add a resistor $r_o$ parallel to the drain current source.

As you can see $r_o \approx \frac{1}{\lambda I_D}$ represent variation of $I_D$ with $V_{DS}$.

And $R_{ds(on)}$ is a FET resistance in the triode region when FET is full-on and $V_{ds}$ is very low $V_{ds}<<(V_{gs} - V_{th})$.

We can estimate the lambda value if we solve this set of equations:

$$I_{d1}=K(V_{gs} - V_{th})^2 (1+\lambda V_{ds1})$$
$$I_{d2}=K(V_{gs} - V_{th})^2 (1+\lambda V_{ds2})$$

$$I_{d1} - I_{d2} = K \lambda (V_{ds1} - V_{ds2}) (V_{gs} - V_{th})^2$$

Use the above to calculate $\lambda$

$$\lambda=\frac{I_{d1} - I_{d2}}{K(V_{ds1} - V_{ds2}) (V_{gs} - V_{th})^2}$$

Or this one

$$\lambda=\frac{I_{d2} - I_{d1}}{I_{d1}V_{ds2} - I_{d2}V_{ds1}}$$

Additional we can find $K$ factor

$$K = \frac{I_{d1}V_{ds2} - I_{d2}V_{ds1}}{(V_{ds2} - V_{ds2})(V_{gs} - V_{th})^2}$$

But we never do this type of calculation when designing circuit using a discrete FET's.

• No, ro is from the channel modulation parameter... it's what causes a non-zero slope of Id when you change Vds. Apr 11 '17 at 19:29
• It will make VERY little difference, and none in practice since the transistor parameters are quite variable. But guesstimate it from the slope or SPICE model and prove it to yourself. Especially with different gm. Apr 11 '17 at 20:10
• @Keno I also noticed that you have been looking the equation/formula for every thing. But you don't find "formula" for every component in the circuit. Sometimes we as a designers need to choose some component values and use trial and error in order to see if we meet our designing goals. It would be a very simple task to design an circuit if you would have formulas for every single component. Even one will be able to do it.
– G36
Apr 12 '17 at 18:15
• @Keno Simply, all you need is two voltage source and one ampere meter to measure the drain current. First you set Vgs and then you change Vds from 0V to 20V and you measure the drain current (or Id at Vds = 5V and Id at Vds = 10V). physics.csbsju.edu/trace/i/nMOSFET.CC.gif or you can look in data sheet the output characteristic plot. Because to find lambda you need output characteristic plot.
– G36
Apr 22 '17 at 14:12
• @Keno Yes you can $$V_A = \frac{I_{C1} V_{CE2} - I_{C2} V_{CE1}}{I_{C2} - I_{C1}}$$ electronics.stackexchange.com/questions/299672/…
– G36
Apr 23 '17 at 13:23

Here's a good summary table of small signal FET equations from the Sedra/Smith textbook on microelectronics, where $V_{ov}$ is the overdrive voltage which is equal to $V_{GS} - V_{tn}$.

NOTE: The reason why your assumption is wrong is because $r_o \neq \frac{1}{g_m}$. Also, your model shows a common source, not a common drain.

• Sorry about common source schematic. Can ro even be calculated with any already given parameters from data sheet, since the channel length parameter (lambda) is not given by data sheets? I know that λ varies between 0.1/V <λ> 0.001/V, can be maybe taken the average value for λ? I saw in many examples from university pdf files taking λ value as it equals approximately 0.02/V.
– Keno
Apr 22 '17 at 10:21