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An embedded device based on ARM926EJ-S revision 5 (ARMv5TEJ) chip. The PCB have 8-pin test points for connecting JTAG debug interface (2.54mm pitch). I tried to find specification for this type of ARM JTAG header and interface pinout table, but can't find anything. I find some description of another device that based on same CPU, but its not too helpful. Can anyone help to define a pinout for this type of JTAG connector? Or any specific implementation may not follow JTAG standard format?

enter image description here

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    \$\begingroup\$ There's no reason to assume it is a standard layout. You'll need to continuity test back to the chip or find a schematic to work out what does what. \$\endgroup\$ Apr 12, 2017 at 21:48
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    \$\begingroup\$ "An embedded device" - Might help to mention what device in case anyone has experience or information with it. \$\endgroup\$ Apr 12, 2017 at 21:49
  • \$\begingroup\$ Here is more detailed pic. \$\endgroup\$
    – sonex
    Apr 13, 2017 at 20:50

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That isn't a standard JTAG pinout. If it is JTAG, though (which isn't a given), there are ways of mapping it out. For the sake of reference, let's number the pins:

7 8
5 6
3 4
1 2

Pin 8 is almost certainly ground -- it looks like it's connected to the ground plane.

Pins 3, 4, 5, and 6 look like they have resistors pulling them to ground. If I'm correct, this means they're inputs: they're likely to be some combination of TDI, TCK, TMS, and possibly TRST.

One of the remaining pins will be VCC. You should be able to find it by checking continuity to other known power nets on the board. Another one will be TDO; there's no obvious way to identify this one.


Beyond this, your best bet will be some combination of:

  • Look up the pinout of the CPU and map out continuity to known JTAG pins on the chip.

  • Guess a pin configuration, hook up a JTAG adapter, and see if it can pick anything up.

  • Use a software tool like JTAGenum to automate this guessing process.

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  • \$\begingroup\$ Is it possible find pinout without a BSDL file? \$\endgroup\$
    – sonex
    Apr 14, 2017 at 12:56
  • \$\begingroup\$ @sonex Yes, using the methodology I laid out in my answer. You don't need a BSDL file to establish basic JTAG communications. \$\endgroup\$
    – user39382
    Apr 14, 2017 at 17:38
  • \$\begingroup\$ Note: I just find that this chip, implemented on another device, have JTAG pins TRST_N, TCK, RTCK, TMS, RST_N, TDO, TDI, GND, 1.8V. In case with my device, its JTAG interface may be limited and have some of these pins not enabled? \$\endgroup\$
    – sonex
    May 3, 2017 at 11:47

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