I have performed timing analysis for synchronous interfaces using clock signal. But how do we do timing of asynchronous interfaces where there is no clock??

To be precise, I am using P2020 from NXP & trying to perform timing analysis of local bus interface.

How do I start without having a clock signal?

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    \$\begingroup\$ Well if the bus doesn't have a clock it must have some kind of strobe, so the analysis would be related to it \$\endgroup\$ – Claudio Avi Chami Apr 14 '17 at 11:07
  • \$\begingroup\$ It has Chip select, Output enable, Write enable, Latch Enable , Address & Data. I am not sure to which signal I can relate to? \$\endgroup\$ – Oshi Apr 14 '17 at 11:23
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    \$\begingroup\$ I guess you will see the relationship of all the signals on the datasheet. \$\endgroup\$ – Claudio Avi Chami Apr 14 '17 at 13:04
  • \$\begingroup\$ The P2020 local bus has a couple of quirks, but the datasheet is quite clear provided you read the notes. PLL bypass mode is far simpler to understand than the PLL enabled setup. \$\endgroup\$ – Peter Smith Apr 14 '17 at 13:55
  • \$\begingroup\$ Have you thoroughly read the Reference Manual for the elbc (section 12)? The reference manual and the electrical datasheet need to be used together (as is usual with [what was Freescale] processors). \$\endgroup\$ – Peter Smith Apr 14 '17 at 14:03

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