I've been working on designing a discrete dual-slope ADC for school, and I've run into a problem. The schematic below shows my proposed input stage, an ideal integrator connected to a comparator. I've learned that you can reduce the input bias current by adding a compensating resistor to the non-inverting terminal of an op-amp.
simulate this circuit – Schematic created using CircuitLab
Since the capacitor behaves like an open circuit at DC, RC1 would presumably be the same value as R2, but I'm not sure how to compensate for the input bias current of the comparator. Here is what I've come up with so far:
Since the goal of a compensation resistor is to match the resistance seen by the two input terminals, I would expect RC2 to be the parallel combination of the output resistance of the op-amp and the input resistance of the comparator. In other words: \$R_{C2} = R_o \parallel R_{i+}\$. My problem is that both of those resistances are difficult to predict.
Questions:
- Is there some other way to compensate for the input bias current for the comparator? Is it necessary?
- Will the input offset voltage and input bias current of the comparator have a significant effect on the op-amp integrator?
- What other ways can I compensate?
I intend to use a precision op-amp and comparator.