# SRAM output flickering

I am using the U62256A 32K x 8 bit static RAM. For testing purposes I connected all outputs to LEDs and since they are also inputs to a dip-switch so I'm able to write data.

The write mode works nicely and stores everything correctly. Data rentention in the RAM chip is also working. What doesn't quite work to my satisfaction is the read mode. Stored 1's (high) are properly output at a stable 5V, but 0's are flickering. My cheap voltmeter reads about 2.4V at the output and the LEDs are visually flickering at about half the brightness of a high output. According to the datasheet there should be a maximum voltage of 0.4V when the output is low.

This is the circuit. The right side of the LS245 is there so I can connect the RAM output to a bus. I have already tried removing it and connecting the outputs directly to the LEDs, as well as disconnecting the dip-switches (not shown in the schematic). I'd like for the LEDs to be simply off when the outputs are low, but with my little knowledge on electronics I can't figure out why they are flickering or what to do about it.

I'll appreciate any and all help!

• If you disconnect the LEDs do you read the expected voltages? – user253751 Apr 19 '17 at 1:18
• Your schematic would be much more useful if you showed the pin names (A0, A1,.. , D0, D1..., etc.). The ~W write enable requires a pull-down resistor to ensure that it will go low when you press the button. What are you doing with the address and data lines? They must be held in known states by tying to Vcc or Gnd, or with pull-up or pull-down resistors. If the inputs are not held in a known stare, they will wander randomly between High and Low. – Peter Bennett Apr 19 '17 at 2:09
• The address inputs are connected to the output of a 2-to-1 line selector so I can choose between an address from a register or manual input. The write enable pin is pulled up. I just updated the schematic. Unfortunately I don't know how to change the pin names in the program I'm using. – Padarom Apr 19 '17 at 8:34
• A voltage of 2.4V implies that you have a bus conflict, something is pulling the wire high at the same time as the SRAM is trying to pull it low. What is the voltage on the lines when the SRAM read line is idle? When idle pull the data line high and then low using a 1k resistor, if it doesn't go to both rails then something else is driving those pins. – Andrew Apr 19 '17 at 8:39

The fact that you have tied the $\overline G$ and $\overline E$ pins hard to ground is probably your issue.
• From how I understand the datasheet this shouldn't be an issue as the timing diagram specifies the read mode is finished on the falling edge of $\overline W$ before writing to the device. Data retention is also only possible while the $\overline E$ pin is low and there is no situation I can see in my application where I want to disable the chip, so I can't see why $\overline E$ is an issue? – Padarom Apr 19 '17 at 13:14
• @Padarom since you are using only $W$ the outputs do not turn off till you drop it, and return to outputs when you raise it. However he data is clocked in when you raise $W$ so obviously you still need to be driving the data lines at that point. Since $t_{LZWE}$ is minimum zero, that means a collision on the bus. – Trevor_G Apr 19 '17 at 13:24
• You may get away with just using $G$ properly and tieing – Trevor_G Apr 19 '17 at 13:25