I'm reading the Spartan 6 user guide on the Memory Controller Block (MCB). The following quote discusses two design flows:
There are two supported design flows for the MCB:
1) Non-embedded design flow
- Conventional FPGA design with the Xilinx® ISE® tool flow
- MIG tool is used within the CORE Generator™ tool for MCB designs
2) Embedded design flow
- Processor-based FPGA system design with EDK tool flow
- IP Configurator in Xilinx Platform Studio (XPS) is used within the EDK environment for MCB designs
I'm not quite sure I understand the difference between the two design flows (despite the above "explanation"). What are the non-embedded and embedded design flows?