I got the following text from lab work 2 of CMU's computer architecture course. I am actually trying to do this lab myself out of own interests and I am in no way a student of CMU.
The machine has a single-cycle microarchitecture: every instruction takes exactly one cycle to execute. Aside from correctness (as dened by the architectural specications), this is the only constraint that we are placing on the machine's microarchitecture. As long as these two constraints are satised (i.e., correctness and single- cycle), you are free to implement the microarchitecture in anyway you want. To guide you along the way, we provide an abstract description of the single-cycle microarchitecture as we discussed in class.
- The architectural state of the machine (excluding memory) is stored in registers: the program counter and general-purpose registers
- There is a global wire called the \clock" that is connected to all the registers.
- When a register sees a rising edge on the clock, the register captures the instantaneous \snapshot" of the values on its input. From then on, the register holds the captured values and feeds them to its output.
- The output from the register(s) are fed into a combinational circuit consisting of logic gates (e.g., ADD). In turn, the output from the logic gates are fed back as input to the register(s).
- At the next rising edge on the clock, the register again captures the values on its input
My doubt: It asks me to implement single cycle architecture but the points numbered from 1 to 5 doesn't seem to be single cycle.
Assume the instruction ADD R1, R2, R3. According to the steps from 1 to 5 this will take two clock cycles and not 1 clock cycle.
At the pos-edge of a clock cycle, the address (address in register file)registers R1 and R2 will be latched and the values in these registers will be sent to ALU for addition.
In the next pos-edge, the output of ALU will be written back to regiSter R3.
So it is actually taking two cycle right? EThen why is it called as single cycle instruction?